Descripción del proyecto
Formación para investigadores sobre semiconductores III-V
El metal-óxido-semiconductor complementario (CMOS) es la principal tecnología de procesamiento comercial para la fabricación de circuitos integrados. Estos procesos se desarrollaron en 1960, y originalmente utilizaban metal como el conductor de puerta. Actualmente, las puertas se construyen con polisilicio. Otro de los cambios tiene que ver con la tendencia hacia la hibridación de funciones; es decir, la unificación de las funciones de detección, alimentación, memoria y fotónica en el mismo chip. En concreto, cada vez hay un mayor interés en la integración de materiales III-V, así como de otros semiconductores complejos, que tienen ciertas ventajas con respecto al silicio. El proyecto DESIGN-EID, financiado con fondos europeos, abordará los obstáculos tecnológicos con una investigación sobre el impacto de los defectos sobre el funcionamiento de dispositivos fotónicos y electrónicos. En el contexto del trabajo, se formará a tres investigadores noveles para que acorten la brecha entre las simulaciones predictivas, los materiales experimentales y el desarrollo de dispositivos.
Objetivo
In semiconductor technology and applications today, we are increasingly observing a shift from the pure silicon CMOS technology towards hybridisation of function in terms of bringing in sensors, power, memory and photonics functionality on the same chip. In particular, there is a great interest in the heterogeneous and monolithic integration of III-V materials and other complex semiconductors, such as III-Nitrides and SiC on Si substrate. However, the direct growth of III-V materials on silicon inevitably will lead to crystal defects that significantly decreases performance of novel devices.
To overcome this main technological challenge and to make this new technology financially viable, the most cost-effective and time-effective approach is to combine experimental and simulation work, which indeed is the main aim on this project – DESING-EID. This will be achieved by addressing the following objectives.
The first objective of DESIGN-EID is to train three young ESRs who will bridge the gap between predictive simulations, experimental materials and device development by developing simulation tools for prediction of crystal growth as a function of process conditions. Secondly, completely eliminating defects in compound semiconductors is likely not achievable, therefore a simulation framework providing an accurate evaluation of their impact on device performance will be essential for designing devices and materials minimizing their impact. Furthermore, semiconductor defects in semiconductors may be exploited for their unique electronic properties if their presence and properties are controlled. For example, vacancies might be used to implement Qu-bits, whereas extended defects, such as dislocations, can provide unique transport properties. Hence, the last objective of the DESIGN-EID project focuses on experimental control and accurate simulation of the impact of defects on electronic and photonic device performance.
Ámbito científico
- engineering and technologymaterials engineeringcrystals
- engineering and technologyelectrical engineering, electronic engineering, information engineeringelectronic engineeringcomputer hardwarequantum computers
- natural sciencesphysical scienceselectromagnetism and electronicssemiconductivity
- natural scienceschemical sciencesinorganic chemistrymetalloids
- natural sciencescomputer and information sciencessoftwaresoftware applicationssimulation software
Palabras clave
Programa(s)
Régimen de financiación
MSCA-ITN - Marie Skłodowska-Curie Innovative Training Networks (ITN)Coordinador
G12 8QQ Glasgow
Reino Unido