Periodic Reporting for period 2 - TWILIGHT (Towards the neW era of 1.6 Tb/s System-In-Package transceivers for datacenter appLIcations exploiting wafer-scale co-inteGration of InP membranes and InP-HBT elecTronics)
Periodo di rendicontazione: 2021-06-01 al 2022-07-31
The key components of datacenters are optical transceivers and switches for generating, transmitting and receiving the data. More data means more transceivers and more switches and hence more power consumption. Keeping pace with the aforementioned increasing traffic demands optical transceivers and switches must support high speed operation and low-latency, as well as to be scalable to meet future requirements. Increasing the capacity of optical transceivers can be achieved following different directions: a) the adoption of advanced modulation formats that increase the information rate e.g. 4-pulse amplitude modulation (PAM4) transmits two bits in the form of one symbol instead of one bit at the pre-defined timeslot, b) increase of the operation speed and c) increase the number of parallel lanes i.e. the number of optical wavelengths per transceiver package.
TWILIGHT vision is two-fold: a) to develop 800 GbE and 1.6T optical transceivers based on 8 and 16 lanes respectively, exploiting the concept of co-packaged optics i.e. placing the optoelectronic engines (OE) around the digital switch ASIC chip as satellite chips forming a multi-chip-module (MCM), and wafer-scale bonding technologies allowing the co-integration of photonics and electronics at unprecedentedly close distances (see attached figure), enabling high speed operation at 112 Gbaud and scalability to even higher capacities surpassing the restrictions of standard pluggable form factors, b) to develop ultra-fast integrated 4x4 and 16x16 optical space switches with scalable number of input/output (I/O) ports targeting the massive datacenter interconnectivity requirements.
TWILIGHT exploits Indium Phosphide (InP) membrane photonic integration circuit (PIC) technology platform for the large-scale integration of high performance active and passive optical components into a single chip and high speed Indium Phosphide Double Heterostructure Bipolar Transistor (InP-DHBT) electronics technology for interfacing with the latest generation of serializer/deserializer (SERDES). More specifically, TWILIGHT has the following technical objectives:
Objective 1: Development of high performance InP photonic components on InP membranes enabling 112 Gbaud per lane transmission for intra- and inter- datacentre applications and ultra-fast large-scale integrated optical switches.
Objective 2: Development of high speed InP-HBT electronics components and ICs for interfacing with next generation 112G SERDES.
Objective 3: Development of system-on-chip photonic platform based on the co-integration of actives and passives enabling complex functionalities.
Objective 4: Towards wafer-scale co-integration of InP photonics and InP-HBT electronics for the development of optoelectronic engines with enhanced capabilities.
Objective 5: Intimate integration of optoelectronic engine with ASIC for the development of system-in-package (SiP) transceiver demonstrators for 1.6T intra- and inter- datacentre applications.
Objective 6: Development of a programmable compact ultra-fast 4×4 and 16×16 optical space switches for low latency intra-datacentre connectivity.
Objective 7: Performance evaluation of the developed TWILIGHT demonstrators under real network conditions and exploitation of project foreground.
The wider societal impact of TWILIGHT mainly relates to resolving the datacenter bottleneck and enabling the upgrade to higher Internet speeds via the cloud which is the foundation for the realization of the numerous modern applications mentioned in the first paragraph.