Work Package 2 aims to provide a system-level use case with its requirements and flow-down to demonstrator and MMIC levels. The main objective has been achieved, with the final activity related to evaluation of results continuing until the project's end. System-level requirements for different applications and orbits, such as LEO, MEO, and GEO, have been provided by ADS and TAS.
Work Package 3 focuses on the operations initiated by SweGaN at a new facility with a new MOCVD system, which is expected to increase production capacity significantly. The transfer of normally-on QuanFINE epitaxy to the new MOCVD system has been performed using 4-inch substrates, exhibiting good thickness uniformity, surface morphology, and high electron mobility. SweGaN and UMS have jointly defined the epitaxial specifications for the first learning cycle, with six wafers grown, characterized, and delivered to UMS.
Work Package 4 involves the development of process modules to reduce parasitic elements and improve power cell designs. FBH developed a new technology module for improved ohmic contacts, reducing contact resistance significantly. Additionally, a new technology for gate metallization was developed, allowing for shorter gate metal and increased gate metallization height, which improved device performance.
Work Package 5 focuses on the characterization and evaluation of transistor devices and process modules. Transistor samples from UMS-F and FBH were shipped to UNIBO for S-parameter measurements and passive CW load-pull measurements. The new Q-band active load-pull setup at FBH is under development to feature increased output power levels.
Work Package 6 involves the foundry service in baseline GH10-10 technology and the evaluation of a fully European supply chain for 0.1µm GaN technology. SweGaN epi wafers have been optimized, and the main electrical parameters are close to target and within electrical specifications. The next wafers are planned to be grown and delivered in June 2025.
Work Package 7 involves the design of MMICs for the first foundry run in the project. SENER, UAB, and UNIBO have performed MMIC designs following MMIC requirements. The main MMICs designed for the first run include HPA, LNA, and Switch, with manufacturing by UMS expected to be completed by July 2025.
Work Package 8 focuses on the design of base test fixtures for the measurement of MMICs from the first run. SENER has designed the base test fixtures, which will be assembled in a thermally conductive metallic base using a silver sintering assembly method. The hermetic MHIC is a metallic package with hermetic WG interfaces, and the design is ongoing.
Work Package 9 involves the reliability and robustness assessment of GaN technology. Two test vehicles, Dynamic Evaluation Circuits (DEC) and Representative Integrated Circuit (RIC), will be used for space qualification and radiation tests. The proposed reliability test plan includes process stability endurance tests, radiation hardness assessments, and various reliability campaigns.
