CORDIS - EU research results
CORDIS

Scaling extreme analYtics with Cross-architecture acceLeration based on OPen Standards​

Project description

Democratising hardware acceleration for AI with RISC-V and SYCL

The widespread adoption of AI has resulted in a market for novel hardware accelerators that can efficiently process AI workloads. Unfortunately, all popular AI accelerators today use proprietary hardware-software stacks, leading to a monopolisation of the acceleration market by a few large industry players. The EU-funded SYCLOPS project aims to democratise AI hardware acceleration by building on open standards. On the hardware front, researchers will promote the adoption of RISC-V, an open instruction set architecture based on established reduced instruction set computer (RISC) principles. On the software front, they will promote the adoption of SYCL, an open, cross-vendor, cross-architecture programming model. Standardised, AI acceleration enabled through SYCLOPS is expected to boost performance and scalability of extreme data analytics.

Objective

The wide-spread adoption of AI and analytics has resulted in a rapidly expanding market for novel hardware accelerators that can provide energy-efficient scaling of training and inference tasks at both the cloud and edge. Unfortunately, all popular solutions AI acceleration solutions today use proprietary, closed hardware—software stacks, leading to a monopolization of the AI acceleration market by a few large industry players.

The vision of SYCLOPS project is to enable better solutions for AI/data mining for extremely large and diverse data by democratizing AI acceleration using open standards, and enabling a healthy, competitive, innovation-driven ecosystem for Europe and beyond. This vision relies on the convergence of two important trends in the industry: (i) the standardization and adoption of RISC-V, a free, open Instruction Set Architecture (ISA), for AI and analytics acceleration, and (ii) the emergence and growth of SYCL as a cross-vendor, cross-architecture, data parallel programming model for all types of accelerators, including RISC-V.

The goal of project SYCLOPS is to bring together these standards for the first time in order to (i) demonstrate ground-breaking advances in performance and scalability of extreme data analytics using a standards-based, fully-open, AI acceleration approach and (ii) enable the development of inter-operable (open and vendor neutral interfaces/APIs), trustworthy (verifiable and standards-based hardware/software), and green (via application-specific processor customization) AI systems. In doing so, we will use the experience gained in SYCLOPS to contribute back to SYCL and RISC-V standards and foster links to respective academic, industrial and innovator communities (RISC-V foundation, EPI, Khronos, ISO C++). Bringing together the two standards enables codesign in both standards, which in turn, will enable a broader AI accelerator design space, and a richer ecosystem of solutions.

Keywords

Coordinator

EURECOM GIE
Net EU contribution
€ 637 216,00
Address
ROUTE DES CHAPPES 450 CAMPUS SOPHIA ANTIPOLIS
06410 Biot
France

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Region
Provence-Alpes-Côte d’Azur Provence-Alpes-Côte d’Azur Alpes-Maritimes
Activity type
Higher or Secondary Education Establishments
Links
Total cost
€ 637 216,25

Participants (6)

Partners (1)