Descrizione del progetto
Next-Generation Nanoelectronics Components and Electronics Integration
3-D integration in high performance digital systems
For developing complex next-generation chips which include a combination of disparate technologies, the circuit integration exclusively in two dimensions has proved to be a seriously limiting factor. Utilising the third dimension for integration of complex chips is a promising technique for removing the bottlenecks in two-dimensional (2-D) integration. Advantages of third-dimension (3-D) integration are in first order form factor and power dissipation.The project ELITE aims at miniaturization and density increase beyond conventional limits by means of exhaustive die stacking. It takes as development vehicle an advanced solid state drive which will widely substitute traditional hard disk drives for purpose of mobile and hand-held applications and which is considered as the enabler of the increasingly developing era of mobile data. The system architecture includes a large amount of non-volatile flash memory, one or more microcontrollers and external analog high-speed interface.One of the main topics of ELITE is the development of a technology for vertical die stacking and for vertical interconnect. Starting from the expertise and experience of the consortium new technology modifications or alternative technologies are investigated. Also assembly technology is investigated considering possible later usage in mass-production with its specific requirements on manufacturability and cost. Conceptual and physical simulations are deployed for planning and ensuring the system architecture and specifying a demonstrator to prove the feasibility of the concept. Firmware inside the chip is used to optimize performance by means of parallel tasks, guarantee highly reliable data access as well as controlling power dissipation.As a final step, generalization of the results which are reached with the solid-state drive vehicle can be generalized in order to be re-used for applications from different technical domains and markets.
For developing complex next-generation chips which include a combination of disparate technologies, the circuit integration exclusively in two dimensions has proved to be a seriously limiting factor. Utilising the third dimension for integration of complex chips is a promising technique for removing the bottlenecks in two-dimensional (2-D) integration. Advantages of third-dimension (3-D) integration are in first order form factor and power dissipation.The proposed project ELITE aims at miniaturization and density increase beyond Moore by means of exhaustive die stacking. It takes as development vehicle an advanced solid state drive which will widely substitute traditional hard disk drives for purpose of mobile and hand-held applications and which is considered as the enabler of the up-coming era of mobile data. The system architecture will include a large amount of non-volatile flash memory, one or more microcontrollers and external analog high-speed interface.One of the main topics of ELITE will be the development of a technology for vertical die stacking and for vertical interconnect. Starting from the expertise and experience of the consortium new technology modifications or alternative technologies will be investigated. Also assembly technology will be investigated considering possible later usage in mass-production with its specific requirements on manufacturability and cost.Conceptual and physical simulations will be deployed for planning and ensuring the system architecture and specifying a demonstrator which will prove the feasibility of the concept. Firmware inside the chip will be used to optimize performance by means of parallel tasks, guaranty highly reliable data access as well as controlling power dissipation.As a final step, generalization of the results which are reached with the solid-state drive vehicle will be generalized in order to be re-used for applications from different technical domains and markets.
Programma(i)
Programmi di finanziamento pluriennali che definiscono le priorità dell’UE in materia di ricerca e innovazione.
Programmi di finanziamento pluriennali che definiscono le priorità dell’UE in materia di ricerca e innovazione.
Argomento(i)
Gli inviti a presentare proposte sono suddivisi per argomenti. Un argomento definisce un’area o un tema specifico per il quale i candidati possono presentare proposte. La descrizione di un argomento comprende il suo ambito specifico e l’impatto previsto del progetto finanziato.
Gli inviti a presentare proposte sono suddivisi per argomenti. Un argomento definisce un’area o un tema specifico per il quale i candidati possono presentare proposte. La descrizione di un argomento comprende il suo ambito specifico e l’impatto previsto del progetto finanziato.
Invito a presentare proposte
Procedura per invitare i candidati a presentare proposte di progetti, con l’obiettivo di ricevere finanziamenti dall’UE.
Procedura per invitare i candidati a presentare proposte di progetti, con l’obiettivo di ricevere finanziamenti dall’UE.
FP7-ICT-2007-1
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Meccanismo di finanziamento
Meccanismo di finanziamento (o «Tipo di azione») all’interno di un programma con caratteristiche comuni. Specifica: l’ambito di ciò che viene finanziato; il tasso di rimborso; i criteri di valutazione specifici per qualificarsi per il finanziamento; l’uso di forme semplificate di costi come gli importi forfettari.
Meccanismo di finanziamento (o «Tipo di azione») all’interno di un programma con caratteristiche comuni. Specifica: l’ambito di ciò che viene finanziato; il tasso di rimborso; i criteri di valutazione specifici per qualificarsi per il finanziamento; l’uso di forme semplificate di costi come gli importi forfettari.
Coordinatore
75015 Paris
Francia
I costi totali sostenuti dall’organizzazione per partecipare al progetto, compresi i costi diretti e indiretti. Questo importo è un sottoinsieme del bilancio complessivo del progetto.