This proposal presents a training-by-research plan in the emerging and exciting field of Atom Probe Tomography (APT) and its application in analysing non planar atomic scale state-of-the art semiconductor nanostructures. Central to this project are the metrology and training advances needed to underpin the next generation of 3 dimensional (3D) device architectures based on atomically engineered materials and interfaces (e.g. FinFETs such as the Tri-gate transistor ). Amongst the possible emerging 3D analysis techniques which meet industrial requirements in terms of 3D-spatial resolution is APT. However, within the semiconductor field APT as a characterisation tool is still in its infancy with many challenges unresolved from both a fundamental understanding perspective as well operational performance. It therefore remains prone to many artefacts and limitations such that one has not yet reached the robust analysis levels required for the semiconductor industry - i.e. qualitative versus quantitative information, high success yield, tight reproducibility and accuracy, and a full understanding of the data quality. Research on the exploitation of APT for advanced semiconductor devices is restricted as it requires simultaneous access to an (expensive) APT tool and advanced semiconductor technology. Thus, the number of trained researchers is limited. This project therefore aims to: (1) advance the APT technique and (2) complement the applicant’s expertise with substantial training and knowledge of the APT technique. Through detailed investigations into the phenomena most impacting on APT new insights which will feed into the needs of the semiconductor industry will be sought. The research and training activities are designed to enhance the future career of the applicant by broadening his technical skills in a novel research area that and increase his prospects for extended funding for future collaborative research projects.
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