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Development of an Advanced Diagnostic System for Sub-PPT Metal Contamination in Silicon Wafer Manufacturing and Processing

Objective

Future IC manufacturing processes will demand significant improvements in the purity of the starting material and better control of individual process steps. Typical metal concentrations in starting bulk Si material are currently of the order of 1E11 to 1E12 cm{-3}. Improvements of one to two orders of magnitude are required for advanced IC devices. In order to meet this technological goal, new analytical strategies need to be developed. The overall objective of DIASYSCON is to develop an easy-to-use advanced diagnostic system for ultra low metal contamination control, based on injection scanning life-time imaging combined with a new generation of monitor wafers. This system will be applied in case studies from wafer-manufacturing, IC production and process development, and is expected to lead to significant improvements in IC yields.
Rapid advances have been made in the application of injection scanning techniques to problems of metal contamination of semiconductor material in a wide variety of technologically relevant situations. Working with a prototype system, methods for the detection, discrimination and imaging of iron boride, iron-1 and oxygen precipitates in concentrations below 1010 cm{3} have been worked out. Highly sensitive CZ silicon wafers have been produced with minority carrier diffusion lengths of greater than 2 mm. In addition to this, an effective increase in system sensitivity of 35 times has been demonstrated. Special monitor wafers for the detection of low levels of copper and nickel have been developed. 'Precipitation hard' CZ silicon wafers were demonstrated to be highly effective in the investigation of contamination in nearly arbitrary process conditions, including extremely long, high temperature processes. An important spin off has led to processes for the production of a precision controlled precipitation wafer.
A four-step approach has been adopted:

- development of injection-level lifetime analysis and imaging techniques
- their hardware and software development
- minority carrier lifetime improvements in silicon wafer manufacturing and the production of lifetime test monitor wafers
- application case studies focussed on contamination control and process improvement in IC fabrication lines.

Coordinator

Memc Materiali Elettronici SpA
Address
Viale Gherzi 31
28100 Novara
Italy

Participants (3)

Commissariat à l'Energie Atomique (CEA)
France
Address
Centre D'études De Grenoble 17 Avenue Des Martyrs
38041 Grenoble
GESELLSCHAFT FÜR MESSTECHNIK AND TECHNOLOGIE
Germany
Address
Geretsrieder Straße, 10A
81379 München
Thomson Microelectronics Srl (SGS)
Italy
Address
Via Carlo Olivetti
20041 Agrate Brianza Milano