Mont-Blanc 2020, European scalable, modular and power efficient HPC processor

Informazioni relative al progetto

Mont-Blanc 2020

ID dell’accordo di sovvenzione: 779877

DOI

10.3030/779877

Progetto chiuso

Data della firma CE 24 Novembre 2017

Data di avvio 1 Dicembre 2017

Data di completamento 31 Marzo 2021

Finanziato da

• INDUSTRIAL LEADERSHIP - Leadership in enabling and industrial technologies - Information and Communication Technologies (ICT)

Costo totale

€ 10 131 848,75

Contributo UE

€ 10 131 848,75

Coordinato da

BULL SAS
France

CORDIS fornisce collegamenti ai risultati finali pubblici e alle pubblicazioni dei progetti ORIZZONTE.

I link ai risultati e alle pubblicazioni dei progetti del 7° PQ, così come i link ad alcuni tipi di risultati specifici come dataset e software, sono recuperati dinamicamente da .OpenAIRE .

Risultati finali

Documents, reports (3)

Project Final Report

This report will be based on the Guidelines provided by the European Commission article 204 of the H2020 annotated Model Grant agreement and will include the following a final publishable summary of the work completed to date covering results the conclusions and socioeconomic impact of the project a chapter on awareness and wider societal implications as well as a report on the distribution of the Community financial contribution It will be presented in conjunction with the final report of Dissemination deliverable D25

Final report on dissemination activities

This report will summarize all the dissemination activities developed all along the projects duration including website and socialnetworks activity press releases publications patent applications presentations tutorials workshops etc

Set of (Mini) applications for HPC tests

This deliverable will specify a list of mini applications that exhibit the characteristic needs of all the segments targeted by MB2020 (e. g. HPC).

Other (1)

Summer school

Once finished the summer school addressed in sub-task sT2.2.2, we will elaborate a report including all the relevant information about this event (i.e., the number of attendants, the name and a short CV of the speakers, the presentations used in their talks and keynotes, etc.).

Pubblicazioni

Conference proceedings (15)

"Mont-Blanc 2020: Simulation Efforts Towards Exascale High Performance Computing : Embedded Tutorial on ""DDECS-2020"""

Autori: Alejandro Nocua; Said Derradji; Gregory Vaumourin; Pierre-Axel Lagadec; Zoltan Menyhart
Pubblicato in: 2020 23rd International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS), 2020, ISBN 978-1-7281-9938-2
Editore: IEEE
DOI: 10.1109/ddecs50862.2020.9095675

Performance Evaluation of ParalleX Execution model on Arm-based Platforms

Autori: Nikunj Gupta, Rohit Ashiwal, Bine Brank, Sateesh K. Peddoju, Dirk Pleiter
Pubblicato in: 2020 IEEE International Conference on Cluster Computing (CLUSTER), 2020, Pagina/e 567-575, ISBN 978-1-7281-6677-3
Editore: IEEE
DOI: 10.1109/cluster49012.2020.00080

BST: A BookSim-Based Toolset to Simulate NoCs with Single- and Multi-Hop Bypass

Autori: Iván Pérez; Enrique Vallejo; Miquel Moretó; Ramón Beivide
Pubblicato in: 2020 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), 2020, ISBN 978-1-7281-4798-7
Editore: IEEE
DOI: 10.1109/ispass48437.2020.00015

Wavefront parallelization of recurrent neural networks on multi-core architectures

Autori: Robin Kumar Sharma, Marc Casas
Pubblicato in: Proceedings of the 34th ACM International Conference on Supercomputing, 2020, Pagina/e 1-12, ISBN 9781450379830
Editore: ACM
DOI: 10.1145/3392717.3392762

Mont-Blanc 2020: Towards Scalable and Power Efficient European HPC Processors

Autori: Adria Armejach, Bine Brank, Jordi Cortina, François Dolique, Timothy Hayes, Nam Ho, Pierre-Axel Lagadec, Romain Lemaire, Guillem Lopez-Paradis, Laurent Marliac, Miquel Moreto, Pedro Marcuello, Dirk Pleiter, Xubin Tan, Said Derradji
Pubblicato in: DATE 2021 Proceedings, 2021
Editore: IEEE

Porting Applications to Arm-based Processors

Autori: Bine Brank, Stepan Nassyr, Fatemeh Pouyan, Dirk Pleiter
Pubblicato in: 2020 IEEE International Conference on Cluster Computing (CLUSTER), 2020, Pagina/e 559-566, ISBN 978-1-7281-6677-3
Editore: IEEE
DOI: 10.1109/cluster49012.2020.00079

TaskGenX: A Hardware-Software Proposal for Accelerating Task Parallelism

Autori: Kallia Chronaki, Marc Casas, Miquel Moreto, Jaume Bosch, Rosa M. Badia
Pubblicato in: ISC 2018 Proceedings, 2018, Pagina/e 389-409
Editore: Springer International Publishing
DOI: 10.1007/978-3-319-92040-5_20

Runtime-Guided Management of Stacked DRAM Memories in Task Parallel Programs

Autori: Lluc Alvarez, Marc Casas, Jesus Labarta, Eduard Ayguade, Mateo Valero, Miquel Moreto
Pubblicato in: Proceedings of the 2018 International Conference on Supercomputing - ICS '18, 2018, Pagina/e 218-228, ISBN 9781-450357838
Editore: ACM Press
DOI: 10.1145/3205289.3205312

Reducing Data Movement on Large Shared Memory Systems by Exploiting Computation Dependencies

Autori: Isaac Sánchez Barrera, Miquel Moretó, Eduard Ayguadé, Jesús Labarta, Mateo Valero, Marc Casas
Pubblicato in: Proceedings of the 2018 International Conference on Supercomputing - ICS '18, 2018, Pagina/e 207-217, ISBN 9781-450357838
Editore: ACM Press
DOI: 10.1145/3205289.3205310

Runtime-Assisted Cache Coherence Deactivation in Task Parallel Programs

Autori: Paul Caheny, Lluc Alvarez, Mateo Valero, Miquel Moreto, Marc Casas
Pubblicato in: SC18: International Conference for High Performance Computing, Networking, Storage and Analysis, 2018, Pagina/e 454-465, ISBN 978-1-5386-8384-2
Editore: IEEE
DOI: 10.1109/sc.2018.00038

Stencil codes on a vector length agnostic architecture

Autori: Adrià Armejach, Helena Caminal, Juan M. Cebrian, Rekai González-Alberquilla, Chris Adeniyi-Jones, Mateo Valero, Marc Casas, Miquel Moretó
Pubblicato in: Proceedings of the 27th International Conference on Parallel Architectures and Compilation Techniques - PACT '18, 2018, Pagina/e 1-12, ISBN 9781-450359863
Editore: ACM Press
DOI: 10.1145/3243176.3243192

Teaching HPC Systems and Parallel Programming with Small-Scale Clusters

Autori: Lluc Alvarez, Eduard Ayguade, Filippo Mantovani
Pubblicato in: 2018 IEEE/ACM Workshop on Education for High-Performance Computing (EduHPC), 2018, Pagina/e 1-10, ISBN 978-1-7281-0190-3
Editore: IEEE
DOI: 10.1109/EduHPC.2018.00004

Enabling HPC Applications for SVE

Autori: Pleiter, Dirk; Brank, Bine; Ho, Nam; Nassyr, Stepan; Portero, Antonio
Pubblicato in: Arm Research Summit 2019, Austin, USA, 2019-09-15 - 2019-09-18, Numero 1, 2019
Editore: Arm Research Summit

A Vulnerability Factor for ECC-protected Memory

Autori: Luc Jaulmes, Miquel Moreto, Mateo Valero, Marc Casas
Pubblicato in: 2019 IEEE 25th International Symposium on On-Line Testing and Robust System Design (IOLTS), 2019, Pagina/e 176-181, ISBN 978-1-7281-2490-2
Editore: IEEE
DOI: 10.1109/IOLTS.2019.8854397

Mont-Blanc 2020 NoC: A low-power and high bandwidth Network on Chip generator

Autori: Pierre-Axel Lagadec, Saïd Derradji, Alejandro Nocua, Zoltan Menyhart
Pubblicato in: Proceedings of the 3rd International Conference on Microelectronic Devices and Technologies (MicDAT '2020), Numero October 2020, 2020, Pagina/e 18-22
Editore: International Frequency Sensor Association (IFSA) Publishing, S. L

Other (1)

The gem5 Simulator: Version 20.0+

Autori: Lowe-Power, Jason; Ahmad, Abdul Mutaal; Akram, Ayaz; Alian, Mohammad; Amslinger, Rico; Andreozzi, Matteo; Armejach, Adrià; Asmussen, Nils; Bharadwaj, Srikant; Black, Gabe; Bloom, Gedare; Bruce, Bobby R.; Carvalho, Daniel Rodrigues; Castrillon, Jeronimo; Chen, Lizhong; Derumigny, Nicolas; Diestelhorst, Stephan; Elsasser, Wendy; Fariborz, Marjan; Farmahini-Farahani, Amin; Fotouhi, Pouya; Gambord, R
Pubblicato in: Numero 1, 2020
Editore: Arxiv

Peer reviewed articles (4)

Using Arm’s scalable vector extension on stencil codes

Autori: Adrià Armejach, Helena Caminal, Juan M. Cebrian, Rubén Langarita, Rekai González-Alberquilla, Chris Adeniyi-Jones, Mateo Valero, Marc Casas, Miquel Moretó
Pubblicato in: The Journal of Supercomputing, Numero 76/3, 2020, Pagina/e 2039-2062, ISSN 0920-8542
Editore: Kluwer Academic Publishers
DOI: 10.1007/s11227-019-02842-5

On the maturity of parallel applications for asymmetric multi-core processors

Autori: Kallia Chronaki, Miquel Moretó, Marc Casas, Alejandro Rico, Rosa M. Badia, Eduard Ayguadé, Mateo Valero
Pubblicato in: Journal of Parallel and Distributed Computing, Numero 127, 2019, Pagina/e 105-115, ISSN 0743-7315
Editore: Academic Press
DOI: 10.1016/j.jpdc.2019.01.007

Checkpoint/restart approaches for a thread-based MPI runtime

Autori: Julien Adam, Maxime Kermarquer, Jean-Baptiste Besnard, Leonardo Bautista-Gomez, Marc Pérache, Patrick Carribault, Julien Jaeger, Allen D. Malony, Sameer Shende
Pubblicato in: Parallel Computing, Numero 85, 2019, Pagina/e 204-219, ISSN 0167-8191
Editore: Elsevier BV
DOI: 10.1016/j.parco.2019.02.006

Design trade-offs for emerging HPC processors based on mobile market technology

Autori: Adrià Armejach, Marc Casas, Miquel Moretó
Pubblicato in: The Journal of Supercomputing, Numero 75/9, 2019, Pagina/e 5717-5740, ISSN 0920-8542
Editore: Kluwer Academic Publishers
DOI: 10.1007/s11227-019-02819-4

Thesis and dissertations (1)

Memory Vulnerability: A Case for Delaying Error Reporting

Autori: Jaulmes, Luc; Moretó, Miquel; Valero, Mateo; Casas, Marc
Pubblicato in: Numero 1, 2018
Editore: Cornel University

Book chapters (1)

On the Benefits of Tasking with OpenMP

Autori: Alejandro Rico, Isaac Sánchez Barrera, Jose A. Joao, Joshua Randall, Marc Casas, Miquel Moretó
Pubblicato in: OpenMP: Conquering the Full Hardware Spectrum - 15th International Workshop on OpenMP, IWOMP 2019, Auckland, New Zealand, September 11–13, 2019, Proceedings, Numero 11718, 2019, Pagina/e 217-230, ISBN 978-3-030-28595-1
Editore: Springer International Publishing
DOI: 10.1007/978-3-030-28596-8_15

Diritti di proprietà intellettuale

Patent (2)

Procédé d'accélération de l'exécution d'un programme à chemin unique par exécution en parallèle de séquences conditionnellement concurrente

Numero candidatura/pubblicazione: PCT/FR2019 051768
Data: 2018-07-18
Candidato/i: COMMISSARIAT A L ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES

Procédé d'accélération de l'exécution d'un programme à chemin unique par exécution en parallèle de séquences conditionnellement concurrente

Numero candidatura/pubblicazione: PCT/FR2019 051768
Data: 2018-07-18
Candidato/i: COMMISSARIAT A L ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES