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Architecting More Than Moore – Wireless Plasticity for Heterogeneous Massive Computer Architectures

Periodic Reporting for period 2 - WiPLASH (Architecting More Than Moore – Wireless Plasticity for Heterogeneous Massive Computer Architectures)

Periodo di rendicontazione: 2020-10-01 al 2023-09-30

The WiPLASH project focuses on the grand challenge of introducing diversification and specialization in heterogeneous processor architectures, while ensuring their generality and scalability. This problem is stalling the progress of computing systems all-pervasive in our society: those processing BigData, executing AI, or driving scientific computations in biology, finance, or complex systems.

In this context, the WiPLASH project takes a radical step further in computing by designing a new breed of massive heterogeneous architectures at extreme scales. Towards this end, WiPLASH pioneered an on-chip wireless communication based on graphene terahertz nano-antennas able to provide architectural plasticity, reconfigurability and adaptation to the application requirements.

The breakthrough of the project is the experimental validation of the graphene-based tunable antennas, as well as their technological and architectural integration, which imply the (i) prototyping of miniaturized and tunable graphene antennas in the terahertz band, (ii) co-integration of graphene RF components with submillimeter-wave transceivers, and (iii) demonstration of low-power reconfigurable wireless chip-scale networks. At the end of the project, the consortium has demonstrated experimentally the tunability, miniaturization, and integrability of graphene antennas in the terahertz band.

The culminating goal of WiPLASH is to show that the wireless plane allows to accelerate future chiplet-based computing platforms by 10X over state-of-the-art baselines when running key applications, including AI. Through full-system simulations of both general-purpose and domain-specific systems, the consortium has proven that wireless-enabled architectures can not only achieve speedups of up to a 5.8X (over 20X if we include in-memory computing cores), but also reduce the thermal hotspots within the processors. This way, WiPLASH paves the way for a new generation of scalable, massively parallel processors.
WiPLASH has made important contributions in multiple spaces, namely:

+ Prototyping graphene antennas. Multiple prototypes with different signal sources, biasing schemes, antenna shapes, and integration capabilities have been fabricated and tested to show the capability of graphene to generate a widely tunable emission in the terahertz band.
+ Integrating the antenna with transceivers. We have developed graphene antennas and compact RF transceiver circuits containing graphene devices, in both cases compatible with wafer-scale graphene production and integration. Hence, we show that there is a path to antenna-transceiver co-integration.
+ Modeling the wireless channel within the computing package. Through simulations in 60-300 GHz range, we demonstrated that single-chip and multi-chip computing packages can support not only multiple frequency channels, but also multiple spatial channels, both enabled by the tunability of the graphene antennas.
+ Developing communication protocols for the chip-scale scenario. We have worked on solutions across the communications stack that are able to manage multiple wireless channels concurrently. Simulations have shown potential to achieve aggregate speeds in excess of 100 Gb/s at the network level.
+ Studying the impact of wireless links in heterogeneous multi-chip architectures. We have considered domain-specific and general-purpose architectures, in both cases integrating in-memory computing (IMC) cores, for different wireless communication speeds. We have observed substantial speedups already for links of several tens of Gb/s. When pushing to hundreds of Gb/s, the wireless approach can achieve 5.8X speedups (over 20X when adding IMC cores). This study is enabled by the non-trivial augmentation of the full-system simulator of WiPLASH with ways to simulate heterogeneous architectures with IMC cores and wireless links across chiplets.
+ Disseminating and exploiting the results of the project extensively. In particular, the WiPLASH consortium has published 38 journal papers, 39 conference papers, and given 36 talks about the project results. We had significant presence in social media, partnered with 16 other EU projects, received multiple awards, and contributed to the creation of a spin-off, among other milestones.
WiPLASH has gone beyond the state of the art in several areas. More specifically, we:

+ Laid down the multi-chip, wireless-enabled vision of massive heterogeneous architectures with system-level recofigurability that graphene antennas can provide. The vision goes beyond the state of the art in the field of wireless chip-scale networks, which considers single-chip architectures, lower frequencies, or unrealistic specifications at the antenna and transceiver.
+ Demonstrated the existence of tunable radiation from a variety of graphene-based terahertz antenna designs. This goes clearly beyond the state of the art in the field because graphene antennas have been explored theoretically, but never measured experimentally.
+ Achieved the integration of graphene RF devices into larger circuits and, eventually, into the transceiver sub-systems required to generate and modulate the signals that will be fed the antenna.
+ Studied the wireless channel at subTHz frequencies in realistic computer chip packages. These results suppose an advance with respect to the state of the art because existing channel models assume unpackaged chips or incorrect positioning of the antennas.
+ Advanced in the integration of in-memory computing (IMC) cores and wireless interconnects into full-system simulators that have been open sourced. Separately, those items may be modeled (partially) in specialized simulators, but have never been put together in the context of a full-system simulator. Therefore, WiPLASH progresses beyond existing approaches and enables the exploration of the architectural design space opened by the wireless technology, which was not possible to date.
+ Developed new wireless-enabled architectures capable of accelerating a variety of workloads. Other works have tried to build wireless-enabled architectures, but have generally not considered multiple chiplets, emerging technologies such as IMC, or AI workloads like we do in WiPLASH. Our publications already show that wireless-enabled architectures have the potential to achieve speedups beyond 5X without IMC and over 20X with IMC, both in general-purpose and domain-specific architectures.

The results of this project are expected to have a disruptive impact in the multi-billion-euro computer processor market, where Europe has traditionally been a secondary player. In this context, WiPLASH represents a window of opportunity to take the lead with a disruptive approach that marks a big departure from more conventional roadmaps and help ensure the independence and sovereignty of Europe in this field. Companies can be created not only focusing on the creation of adaptive AI processors for multiple application areas, but also exploiting any of the partial results of the project such as the creation of lightweight and versatile terahertz antennas or the design of high-speed compact transceivers. From the architectural standpoint, new versatile processor architectures can open the door to new solutions not only in AI processing, with relevant applications in neuroscience, drug discovery, or disease detection, but also in other fields such as BigData, genomics, finance, or the automotive industry.
Speedups of a wireless-enabled domain-specific architecture
WiPLASH vision and cross-cutting approach
Integration of graphene in RF devices
Speedups of a wireless-enabled general-purpose architecture
Artist view of the WiPLASH vision
Architectural view of a wireless-enabled architecture