Skip to main content

Low thermal budget epitaxy of Si and Si-alloys

Objective

The Low-T Si-epi network programme combines two main topics: preparation of epitaxial Si and SiGe layers at low temperatures and the characterization of these materials, and the application of these layers in working devices. The low temperature is essential for creating well defined, sharp concentration transitions between different layers with well controlled thicknesses, and for not disturbing already existing profiles in the substrates. Attention will be devoted to selective and differential growth.For epi-growth, all existing techniques are involved: UHV-CVD, LPCVD, RTCVD, APCVD, GSMBE, SSMBE. As characterization techniques, SIMS, TEM, RBS, AFM, X-ray diffraction, optical miscroscopy a.o. will be used. The layers thus fabricated will be applied in several types of devices; among these are both p-type and n-type modulation doped layers for 2D hole and electron gas structures. Simultaneously, the influence of the layer parameters such as spaces and quantum well thickness on carrier mobilities will be studied. SiGe-layers with a very high Ge-content will be used for Real Space Transport Transistors. Si/SiGe quantum wells will be used for integrated matrix IR detectors. Also, demonstration of submicron Si/SiGe quantum well MOS transistors is planned.
A thorough study of silicon nucleation has been performed on ultrahigh vacuum (UHV) chemical vapour deposition (CVD) grown layers. Multilayers for 2-dimensional electron and hole confinement have been grown with excellent results. Silicon on silicon germanide multiquantum well structures have been grown with in situ spectroscopic ellipsometric measurements; these layers have been used for infrared absorption detectors. Selective growth of silicon and silicon germanide layers has been realized in gas source molecular beam epitaxy (GSMBE) as well as in low pressure chemical vapour deposition (LPCVD). Layers from the latter were studied with respect to growth uniformity and relaxation in small pads for application in resonant tunnelling diode structures. RTCVD grown P-channel metal oxide semiconductor (PMOS) structures have been processed to quantum wave (QW) metal oxide semiconductor field effect transistors (MOSFET), for which a number of critical processing steps had to be optimized to the low temperature constraints. A general model has been developed for optical absorption in n-type indirect QWs as a function of growth direction for infrared/quantum well detectors; germanium is found to be the best material in groups III, IV and V.

Coordinator

INTERUNIVERSITAIR MIKRO-ELEKTRONICA CENTRUM VZW
Address
75,Kapeldreef 75
3001 Heverlee
Belgium

Participants (5)

Centre National d'Études des Télécommunications (CNET)
France
Address
98 Chemin Du Vieux Chêne
38243 Meylan
DELFT UNIVERSITY OF TECHNOLOGY
Netherlands
Address
17,Feldmannweg 17
2600 GA Delft
Forschungszentrum Jülich GmbH
Germany
Address
Wilhelm-johnen-straße
52405 Jülich
LINKOEPING UNIVERSITY
Sweden
Address
23,Valla
58183 Linkoeping
NEDERLANDSE PHILIPS BEDRIJVEN BV
Netherlands
Address
4,Professor Holstlaan 4
5656 AA Eindhoven