Outplaying the hardware lottery for embedded AI

Informazioni relative al progetto

BINGO

ID dell’accordo di sovvenzione: 101088865

DOI

10.3030/101088865

Data della firma CE 2 Marzo 2023

Data di avvio 1 Giugno 2023

Data di completamento 31 Maggio 2028

Finanziato da

• European Research Council (ERC)

Costo totale

€ 1 995 750,00

Contributo UE

€ 1 995 750,00

Coordinato da

KATHOLIEKE UNIVERSITEIT LEUVEN
Belgium

CORDIS fornisce collegamenti ai risultati finali pubblici e alle pubblicazioni dei progetti ORIZZONTE.

I link ai risultati e alle pubblicazioni dei progetti del 7° PQ, così come i link ad alcuni tipi di risultati specifici come dataset e software, sono recuperati dinamicamente da .OpenAIRE .

Pubblicazioni

Conference proceedings (15)

BitWave: Exploiting Column-Based Bit-Level Sparsity for Deep Learning Acceleration

Autori: Man Shi, Vikram Jain, Antony Joseph, Maurice Meijer, Marian Verhelst
Pubblicato in: 2024 IEEE International Symposium on High-Performance Computer Architecture (HPCA), 2024
Editore: IEEE
DOI: 10.1109/HPCA57654.2024.00062

TreeGRNG: Binary Tree Gaussian Random Number Generator for Efficient Probabilistic AI Hardware

Autori: Jonas Crols; Guilherme Paim; Shirui Zhao; Marian Verhelst
Pubblicato in: 2024 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2024
Editore: IEEE and AMC
DOI: 10.23919/DATE58400.2024.10546516

Enabling Efficient Hardware Acceleration of Hybrid Vision Transformer (ViT) Networks at the Edge

Autori: Joren Dumoulin, Pouya Houshmand, Vikram Jain, Marian Verhelst
Pubblicato in: 2024 IEEE International Symposium on Circuits and Systems (ISCAS), 2024
Editore: IEEE
DOI: 10.1109/ISCAS58744.2024.10558587

DataMaestro: A Versatile and Efficient Data Streaming Engine Bringing Decoupled Memory Access To Dataflow Accelerators

Autori: Xiaoling Yi, Yunhao Deng, Ryan Antonio, Fanchen Kong, Guilherme Paim, Marian Verhelst
Pubblicato in: IEEE/ACM Design Automation Conference 2025, 2025
Editore: to be published by IEEE

Energy Cost Modelling for Optimizing Large Language Model Inference on Hardware Accelerators

Autori: Robin Geens, Man Shi, Arne Symons, Chao Fang, Marian Verhelst
Pubblicato in: 2024 IEEE 37th International System-on-Chip Conference (SOCC), 2024
Editore: IEEE
DOI: 10.1109/SOCC62300.2024.10737844

Optimizing Layer-Fused Scheduling of Transformer Networks on Multi-accelerator Platforms

Autori: Steven Colleman, Arne Symons, Victor J.B. Jung, Marian Verhelst
Pubblicato in: 2024 25th International Symposium on Quality Electronic Design (ISQED), 2024
Editore: IEEE
DOI: 10.1109/ISQED60706.2024.10528689

AIA: A 16nm Multicore SoC for Approximate Inference Acceleration Exploiting Non-normalized Knuth-Yao Sampling and Inter-Core Register Sharing

Autori: Shirui Zhao, Nimish Shah, Wannes Meert, Marian Verhelst
Pubblicato in: 2024 IEEE European Solid-State Electronics Research Conference (ESSERC), 2024
Editore: IEEE
DOI: 10.1109/ESSERC62670.2024.10719485

Optimising GPGPU Execution Through Runtime Micro-Architecture Parameter Analysis

Autori: Giuseppe M. Sarda, Nimish Shah, Debjyoti Bhattacharjee, Peter Debacker, Marian Verhelst
Pubblicato in: 2023 IEEE International Symposium on Workload Characterization (IISWC), 2023
Editore: IEEE
DOI: 10.1109/IISWC59245.2023.00017

CMDS: Cross-layer Dataflow Optimization for DNN Accelerators Exploiting Multi-bank Memories

Autori: Man Shi, Steven Colleman, Charlotte VanDeMieroop, Antony Joseph, Maurice Meijer, Wim Dehaene, Marian Verhelst
Pubblicato in: 2023 24th International Symposium on Quality Electronic Design (ISQED), 2024, ISSN 1948-3287
Editore: IEEE
DOI: 10.1109/ISQED57927.2023.10129330

Anda: Unlocking Efficient LLM Inference with a Variable-Length Grouped Activation Data Format

Autori: Chao Fang, Man Shi, Robin Geens, Arne Symons, Zhongfeng Wang, Marian Verhelst
Pubblicato in: 2025 IEEE International Symposium on High Performance Computer Architecture (HPCA), 2025
Editore: IEEE
DOI: 10.1109/HPCA61900.2025.00110

Analog or Digital In-Memory Computing? Benchmarking Through Quantitative Modeling

Autori: Jiacong Sun, Pouya Houshmand, Marian Verhelst
Pubblicato in: 2023 IEEE/ACM International Conference on Computer Aided Design (ICCAD), 2024
Editore: IEEE
DOI: 10.1109/ICCAD57390.2023.10323763

iEEG Seizure Detection with a Sparse Hyperdimensional Computing Accelerator

Autori: Stef Cuyckens, Ryan Antonio, Chao Fang, Marian Verhelst
Pubblicato in: 2025 20th International Conference on PhD Research in Microelectronics and Electronics (PRIME), 2025
Editore: IEEE
DOI: 10.1109/PRIME66228.2025.11203735

ACCO: Automated Causal CNN Scheduling Optimizer for Real-Time Edge Accelerators

Autori: Jun Yin, Linyan Mei, Andre Guntoro, Marian Verhelst
Pubblicato in: Proceedings of IEEE 41st International Conference on Computer Design (ICCD), Numero 41, 2023
Editore: IEEE

The Configuration Wall: Characterization and Elimination of Accelerator Configuration Overhead

Autori: Josse Van Delm, Anton Lydike, Joren Dumoulin, Jonas Crols, Xiaoling Yi, Ryan Antonio, Jackson Woodruff, Tobias Grosser, Marian Verhelst
Pubblicato in: Proceedings of the 31st ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 1, 2025
Editore: ACM
DOI: 10.1145/3760250.3762225

OpenGeMM: A Highly-Efficient GeMM Accelerator Generator with Lightweight RISC-V Control and Tight Memory Coupling

Autori: Xiaoling Yi, Ryan Antonio, Joren Dumoulin, Jiacong Sun, Josse Van Delm, Guilherme Pereira Paim, Marian Verhelst
Pubblicato in: Proceedings of the 30th Asia and South Pacific Design Automation Conference, 2025
Editore: ACM
DOI: 10.1145/3658617.3697652

Peer reviewed articles (10)

IEEE Access

Autori: Dadras, Iman; Sarda, Giuseppe M.; Laubeuf, Nathan; Bhattacharjee, Debjyoti; Mallik, Arindam
Pubblicato in: IEEE Access, 2023, ISSN 2169-3536
Editore: Institute of Electrical and Electronics Engineers Inc.
DOI: 10.1109/ACCESS.2023.3305432

An Analytical Model for Performance-Carbon Co-Optimization of Edge AI Accelerators

Autori: Jiacong Sun; Xiaoling Yi; Arne Symons; Georges Gielen; Lieven Eeckhout; Marian Verhelst
Pubblicato in: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2025, ISSN 1937-4151
Editore: IEEE
DOI: 10.1109/TCAD.2025.3602746

AIA: A Customized Multi-Core RISC-V SoC for Discrete Sampling Workloads in 16 nm

Autori: Shirui Zhao; Nimish Shah; Wannes Meert; Marian Verhelst
Pubblicato in: IEEE Journal of Solid-State Circuits, 2025, ISSN 1558-173X
Editore: IEEE
DOI: 10.1109/JSSC.2025.3561880

Exploiting neuro-inspired dynamic sparsity for energy-efficient intelligent perception

Autori: Sheng Zhou, Chang Gao, Tobi Delbruck, Marian Verhelst, Shih-Chii Liu
Pubblicato in: Nature Communications, Numero 16, 2025, ISSN 2041-1723
Editore: Springer Science and Business Media LLC
DOI: 10.1038/S41467-025-65387-7

MATCH: Model-Aware TVM-Based Compilation for Heterogeneous Edge Devices

Autori: Mohamed Amine Hamdi, Francesco Daghero, Giuseppe Maria Sarda, Josse Van Delm, Arne Symons, Luca Benini, Marian Verhelst, Daniele Jahier Pagliari, Alessio Burrello
Pubblicato in: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2025, ISSN 0278-0070
Editore: Institute of Electrical and Electronics Engineers (IEEE)
DOI: 10.1109/TCAD.2025.3556967

SparseCol: A 1320 BTOPS/W Precision-Scalable NPU Exploiting Training-Free Structured Bit-Level Sparsity and Dynamic Dataflow

Autori: Man Shi, Vikram Jain, Weijie Jiang, Chao Fang, Antony Joseph, Wim Dehaene, Marian Verhelst
Pubblicato in: IEEE Journal of Solid-State Circuits, 2025, ISSN 0018-9200
Editore: Institute of Electrical and Electronics Engineers (IEEE)
DOI: 10.1109/JSSC.2025.3636451

MATCH: Model-Aware TVM-Based Compilation for Heterogeneous Edge Devices

Autori: Mohamed Amine Hamdi; Francesco Daghero; Giuseppe Maria Sarda; Josse Van Delm; Arne Symons; Luca Benini; Marian Verhelst; Daniele Jahier Pagliari; Alessio Burrello
Pubblicato in: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2025, ISSN 1937-4151
Editore: IEEE
DOI: 10.48550/ARXIV.2410.08855

Stream: Design Space Exploration of Layer-Fused DNNs on Heterogeneous Dataflow Accelerators

Autori: Arne Symons, Linyan Mei, Steven Colleman, Pouya Houshmand, Sebastian Karl, Marian Verhelst
Pubblicato in: IEEE Transactions on Computers, Numero 74, 2024, ISSN 0018-9340
Editore: Institute of Electrical and Electronics Engineers (IEEE)
DOI: 10.1109/TC.2024.3477938

How to Keep Pushing ML Accelerator Performance? Know Your Rooflines!

Autori: Marian Verhelst, Luca Benini, Naveen Verma
Pubblicato in: IEEE Journal of Solid-State Circuits, Numero 60, 2025, ISSN 0018-9200
Editore: Institute of Electrical and Electronics Engineers (IEEE)
DOI: 10.1109/JSSC.2025.3553765

<i>SunPar</i>: An Analytical Design Space Exploration Framework Modeling Performance Uncertainty in Sparse AI Accelerators

Autori: Jiacong Sun; Man Shi; Mahesh Subedar; Georges Gielen; Marian Verhelst
Pubblicato in: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2025, ISSN 1937-4151
Editore: IEEE
DOI: 10.1109/TCAD.2025.3613662

Other (1)

COAC: Cross-Layer Optimization of Accelerator Configurability for Efficient CNN Processing

Autori: Steven Colleman; Man Shi; Marian Verhelst
Pubblicato in: IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2023, ISSN 1557-9999
Editore: IEEE
DOI: 10.48550/ARXIV.2406.13752