Together for RISc-V Technology and ApplicatioNs

CORDIS fornisce collegamenti ai risultati finali pubblici e alle pubblicazioni dei progetti ORIZZONTE.

I link ai risultati e alle pubblicazioni dei progetti del 7° PQ, così come i link ad alcuni tipi di risultati specifici come dataset e software, sono recuperati dinamicamente da .OpenAIRE .

Risultati finali

Intermediate Integration Report with Demonstrators early access
Framework for RISC-V – final prototype, report, Open-Source
Design Specifications of demonstrators
Stakeholder Engagement Plan

Stakeholder Engagement Plan.

Initial requirements architectural map of the demonstrators

Initial requirements architectural map of the demonstrators.

Preliminary integration Report
Intermediate requirements architectural map of the demonstrators
Initial requirements and feedback for SW and EDA Tools IPs

Initial requirements and feedback for SW and EDA Tools IPs.

Initial requirements and feedback for processor and hardware IPs

Development of initial requirements and feedback for processor and hardware IPs.

Interim report on dissemination and exploitation of project results

Interim report on dissemination and exploitation of project results.

EDA framework for RISC-V - prototype, report, Open-Source
All governance boards installed

All governance boards installed.

Pubblicazioni

SeTHet - Sending Tuned numbers over DMA onto Heterogeneous clusters: an automated precision tuning story

Autori: Gabriele Magnani, Daniele Cattaneo, Lev Denisov, Giuseppe Tagliavini, Giovanni Agosta, Stefano Cherubin
Pubblicato in: Proceedings of the 21st ACM International Conference on Computing Frontiers, 2024
Editore: ACM
DOI: 10.1145/3649153.3649203

Trikarenos: A Fault-Tolerant RISC-V-based Microcontroller for CubeSats in 28nm

Autori: Michael Rogenmoser, Luca Benini
Pubblicato in: 2023 30th IEEE International Conference on Electronics, Circuits and Systems (ICECS), 2024
Editore: IEEE
DOI: 10.1109/ICECS58634.2023.10382727

µArchiFI: Formal Modeling and Verification Strategies for Microarchitetural Fault Injections

Autori: Tollec, Simon; Asavoae, Mihail; Couroussé, Damien; Heydemann, Karine; Jan, Mathieu
Pubblicato in: 2023
Editore: TU Wien Academic Press
DOI: 10.34727/2023/ISBN.978-3-85448-060-0_18

SentryCore: A RISC-V Co-Processor System for Safe, Real-Time Control Applications

Autori: Michael Rogenmoser; Alessandro Ottaviano; Thomas Benz; Robert Balas; Matteo Perotti; Angelo Garofalo; Luca Benini
Pubblicato in: CoRR, 2024
Editore: ETH Zurich Research Collection / ETH Library
DOI: 10.48550/ARXIV.2406.06546

SeTHet - Sending Tuned numbers over DMA onto Heterogeneous clusters: an automated precision tuning story

Autori: Magnani, Gabriele; Cattaneo, Daniele; Denisov, Lev; Tagliavini, Giuseppe; Agosta, Giovanni; Cherubin, Stefano
Pubblicato in: Proceedings of the 21st ACM International Conference on Computing Frontiers, 2024
Editore: Association for Computing Machinery
DOI: 10.1145/3649153.3649203

Implementation and integration of Keccak accelerator on RISC-V for CRYSTALS-Kyber

Autori: Alessandra Dolmeta, Mattia Mirigaldi, Maurizio Martina, and Guido Masera
Pubblicato in: Proceedings of the 20th ACM International Conference on Computing Frontiers, 2023
Editore: ACM
DOI: 10.1145/3587135.3591432

PELS: A Lightweight and Flexible Peripheral Event Linking System for Ultra-Low Power IoT Processors

Autori: Ottaviano A.; Balas R.; Sauter P.; Eggimann M.; Benini L.
Pubblicato in: 2024 Design, Automation &amp; Test in Europe Conference &amp; Exhibition (DATE), 2024
Editore: IEEE / Institute of Electrical and Electronics Engineers Inc.
DOI: 10.48550/ARXIV.2311.09645

Trikarenos: A Fault-Tolerant RISC-V-based Microcontroller for CubeSats in 28nm

Autori: Rogenmoser, Michael; Benini, Luca
Pubblicato in: 2023 30th IEEE International Conference on Electronics, Circuits and Systems (ICECS), 2023
Editore: IEEE
DOI: 10.48550/ARXIV.2310.02045

Functional Verification Strategy for an Open-Source High-Performance L1 Data-Cache for RISC-V cores

Autori: Khandelwal, Tanuj; Pion, Ludovic; Fuguet, César; Evans, Adrian
Pubblicato in: 2023
Editore: HAL open science / HAL CCSD

AXI-REALM: A Lightweight and Modular Interconnect Extension for Traffic Regulation and Monitoring of Heterogeneous Real-Time SoCs

Autori: Thomas Benz; Alessandro Ottaviano; Robert Balas; Angelo Garofalo; Francesco Restuccia 0002; Alessandro Biondi 0001; Luca Benini
Pubblicato in: 2024 Design, Automation &amp; Test in Europe Conference &amp; Exhibition (DATE), 2024
Editore: IEEE
DOI: 10.48550/ARXIV.2311.09662

ZeroNER: Fueling Zero-Shot Named Entity Recognition via Entity Type Descriptions

Autori: Alessio Cocchieri; Marcos Martínez Galindo; Giacomo Frisoni; Gianluca Moro; Claudio Sartori; Giuseppe Tagliavini
Pubblicato in: Findings of the Association for Computational Linguistics: ACL 2025, 2025
Editore: Association for Computational Linguistics
DOI: 10.18653/V1/2025.FINDINGS-ACL.805

Precision-aware Latency and Energy Balancing on Multi-Accelerator Platforms for DNN Inference

Autori: Risso, Matteo; Burrello, Alessio; Sarda, Giuseppe Maria; Benini, Luca; Macii, Enrico; Poncino, Massimo; Verhelst, Marian; Pagliari, Daniele Jahier
Pubblicato in: 2023 IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED), 2023
Editore: IEEE
DOI: 10.48550/ARXIV.2306.05060

Hardware architecture for CRYSTALS-Kyber post-quantum cryptographic SHA-3 primitives

Autori: Dolmeta, Alessandra; Martina, Maurizio; Masera, Guido
Pubblicato in: 2023 18th Conference on Ph.D Research in Microelectronics and Electronics (PRIME), 2023
Editore: IEEE
DOI: 10.1109/prime58259.2023.10161780

Integrating SystemC-AMS Power Modeling with a RISC-V ISS for Virtual Prototyping of Battery-operated Embedded Devices

Autori: Hamdi, Mohamed Amine; Pollo, Giovanni; Risso, Matteo; Germain Haugou; Burrello, Alessio; MACII, Enrico; Poncino, Massimo; Vinco, Sara; JAHIER PAGLIARI, DANIELE
Pubblicato in: Proceedings of the 21st ACM International Conference on Computing Frontiers: Workshops and Special Sessions, 2024
Editore: Association for Computing Machinery
DOI: 10.48550/ARXIV.2404.01861

AXI-REALM: A Lightweight and Modular Interconnect Extension for Traffic Regulation and Monitoring of Heterogeneous Real-Time SoCs

Autori: Thomas Benz, Alessandro Ottaviano, Robert Balas, Angelo Garofalo, Francesco Restuccia, Alessandro Biondi, Luca Benini
Pubblicato in: 2024 Design, Automation &amp; Test in Europe Conference &amp; Exhibition (DATE), 2024
Editore: IEEE
DOI: 10.23919/DATE58400.2024.10546511

Assessing the Performance of OpenTitan as Cryptographic Accelerator in Secure Open-Hardware System-on-Chips

Autori: Emanuele Parisi; Alberto Musa; Maicol Ciani; Francesco Barchi; Davide Rossi 0001; Andrea Bartolini; Andrea Acquaviva
Pubblicato in: Proceedings of the 21st ACM International Conference on Computing Frontiers, 2024
Editore: Association for Computing Machinery
DOI: 10.48550/ARXIV.2402.10395

Lightweight Instrumentation for Accurate Performance Monitoring in RTOSes

Autori: Bruno Forlin, Kuan-Hsun Chen, Nikolaos Alachiotis, Luca Cassano, Marco Ottavi
Pubblicato in: 2024 Design, Automation &amp; Test in Europe Conference &amp; Exhibition (DATE), 2024
Editore: IEEE
DOI: 10.23919/DATE58400.2024.10546790

An unprotected RISC-V Soft-core processor on an SRAM FPGA: Is it as bad as it sounds?

Autori: Bruno Endres Forlin, Wouter van Huffelen, Carlo Cazzaniga, Paolo Rech, Nikolaos Alachiotis, Marco Ottavi
Pubblicato in: 2023 IEEE European Test Symposium (ETS), 2023
Editore: IEEE
DOI: 10.1109/ETS56758.2023.10174076

Neutron Radiation Tests of the NEORV32 RISC-V SoC on Flash-Based FPGAs

Autori: Kevin Böhmer, Bruno Forlin, Carlo Cazzaniga, Paolo Rech, Gianluca Furano, Nikolaos Alachiotis, Marco Ottavi
Pubblicato in: 2023 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), 2024
Editore: IEEE
DOI: 10.1109/DFT59622.2023.10313556

Preventing Soft Errors and Hardware Trojans in RISC-V Cores

Autori: Edian B. Annink, Gerard Rauwerda, Edwin Hakkennes, Alessandra Menicucci, Stefano Di Mascio, Gianluca Furano, Marco Ottavi
Pubblicato in: 2022 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), 2022
Editore: IEEE
DOI: 10.1109/DFT56152.2022.9962340

PLiNIO: A User-Friendly Library of Gradient-Based Methods for Complexity-Aware DNN Optimization

Autori: D. Jahier Pagliari, M. Risso, B. A. Motetti and A. Burrello
Pubblicato in: 2023 Forum on Specification & Design Languages (FDL), 2023, ISSN 1636-9874
Editore: IEEE
DOI: 10.1109/FDL59689.2023.10272045

Using a Performance Model to Implement a Superscalar CVA6

Autori: Côme Allart; Jean-Roch Coulon; André Sintzoff; Olivier Potin; Jean-Baptiste Rigaud
Pubblicato in: Proceedings of the 21st ACM International Conference on Computing Frontiers: Workshops and Special Sessions, 2024
Editore: Association for Computing Machinery
DOI: 10.48550/ARXIV.2410.01442

Driving Towards Safety: Online PPG-based Drowsiness Detection with TCNs

Autori: Rapa P. M.; Orlandi M.; Amidei A.; Burrello A.; Rabbeni R.; Pavan P.; Benini L.; Benatti S.
Pubblicato in: 2024 IEEE 6th International Conference on AI Circuits and Systems (AICAS), 2024
Editore: Institute of Electrical and Electronics Engineers Inc.
DOI: 10.1109/AICAS59952.2024.10595972

HPDcache

Autori: César Fuguet
Pubblicato in: Proceedings of the 20th ACM International Conference on Computing Frontiers, 2023, ISSN 1942-3462
Editore: ACM
DOI: 10.1145/3587135.3591413

Design and Experimental Investigation of Trikarenos: A Fault-Tolerant 28nm RISC-V-based SoC

Autori: Michael Rogenmoser; Philip Wiese; Bruno E. Forlin; Frank K. Gürkaynak; Paolo Rech; Alessandra Menicucci; Marco Ottavi; Luca Benini
Pubblicato in: CoRR, 2024
Editore: ETH Zurich Research Collection / ETH Library
DOI: 10.3929/ETHZ-B-000714399

Neutron Beam Evaluation of Probabilistic Data Structure-based Online Checkers

Autori: Bruno Forlin, Edian B. Annink, Elijah Cishugi, Carlo Cazzaniga, Paolo Rech, Gerard Rauwerda, Gianluca Furano, Marco Ottavi
Pubblicato in: 2024 IEEE 30th International Symposium on On-Line Testing and Robust System Design (IOLTS), 2024
Editore: IEEE
DOI: 10.1109/IOLTS60994.2024.10616084

Seeing Beyond the Order: a LEN5 to Sharpen Edge Microprocessors with Dynamic Scheduling

Autori: Caon, Michele; Petrolo, Vincenzo; Mirigaldi, Mattia; Guella, Flavia; Masera, Guido; Martina, Maurizio
Pubblicato in: Proceedings of the 21st ACM International Conference on Computing Frontiers: Workshops and Special Sessions, 2024
Editore: Association for Computing Machinery
DOI: 10.1145/3637543.3652880

An Enhanced Fault Injection Framework for FPGA-Based Soft-Cores

Autori: Tijmen T. Smit, Bruno Endres Forlin, Kuan-Hsun Chen, Ioanna Souvatzoglou, Mihalis Psarakis, Marco Ottavi
Pubblicato in: 2024 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), 2024
Editore: IEEE
DOI: 10.1109/DFT63277.2024.10753564

A Gigabit, DMA-enhanced Open-Source Ethernet Controller for Mixed-Criticality Systems

Autori: Chaoqun Liang; Alessandro Ottaviano; Thomas Benz; Mattia Sinigaglia; Luca Benini; Angelo Garofalo; Davide Rossi 0001
Pubblicato in: Proceedings of the 21st ACM International Conference on Computing Frontiers: Workshops and Special Sessions, 2024
Editore: Association for Computing Machinery
DOI: 10.48550/ARXIV.2406.06394

Hybrid Modular Redundancy: Exploring Modular Redundancy Approaches in RISC-V Multi-Core Computing Clusters for Reliable Processing in Space

Autori: Michael Rogenmoser; Yvan Tortorella; Davide Rossi; Francesco Conti; Luca Benini
Pubblicato in: ACM Transactions on Cyber-Physical Systems, 2023, ISSN 2378-9638
Editore: Association for Computing Machinery
DOI: 10.48550/arxiv.2303.08706

Toward Attention-Based TinyML: A Heterogeneous Accelerated Architecture and Automated Deployment Flow

Autori: Philip Wiese; Gamze Islamoglu; Moritz Scherer 0001; Luka Macan; Victor Jean-Baptiste Jung; Alessio Burrello; Francesco Conti 0001; Luca Benini
Pubblicato in: IEEE Design & Test, 2025, ISSN 2168-2364
Editore: Institute of Electrical and Electronics Engineers Inc.
DOI: 10.48550/ARXIV.2408.02473

Energy-Efficient Exposed Datapath Architecture With a RISC-V Instruction Set Mode

Autori: Kari Hepola, Joonas Multanen, Pekka Jääskeläinen
Pubblicato in: IEEE Transactions on Computers, Numero 73, 2024, ISSN 0018-9340
Editore: Institute of Electrical and Electronics Engineers (IEEE)
DOI: 10.1109/TC.2023.3337313

vCLIC: Towards Fast Interrupt Handling in Virtualized RISC-V Mixed-Criticality Systems

Autori: Zelioli, Enrico; Ottaviano, Alessandro; Balas, Robert; Wistoff, Nils; Garofalo, Angelo; Benini, Luca
Pubblicato in: 2024 IEEE 42nd International Conference on Computer Design (ICCD), 2024, ISSN 1063-6404
Editore: Institute of Electrical and Electronics Engineers Inc.
DOI: 10.3929/ETHZ-B-000713313

Cross-Document Distillation via Graph-Based Summarization of Extracted Essential Knowledge

Autori: Luca Ragazzi; Gianluca Moro; Lorenzo Valgimigli; Riccardo Fiorani
Pubblicato in: IEEE Transactions on Audio, Speech and Language Processing, 2025, ISSN 2329-9304
Editore: Institute of Electrical and Electronics Engineers Inc.
DOI: 10.1109/TASLP.2024.3490375

IEEE Access

Autori: Alessandra Dolmeta; Maurizio Martina; Guido Masera
Pubblicato in: IEEE Access, 2024, ISSN 2169-3536
Editore: Institute of Electrical and Electronics Engineers Inc.
DOI: 10.1109/ACCESS.2024.3511340

TOP: Towards Open & Predictable Heterogeneous SoCs

Autori: Luca Valente; Francesco Restuccia 0002; Davide Rossi 0001; Ryan Kastner; Luca Benini
Pubblicato in: IEEE Transactions on Computers, 2024, ISSN 1557-9956
Editore: Institute of Electrical and Electronics Engineers Inc.
DOI: 10.48550/ARXIV.2401.15639

Enhancing Neural Architecture Search with Multiple Hardware Constraints for Deep Learning Model Deployment on Tiny IoT Devices

Autori: A. Burrello, M. Risso, B. A. Motetti, E. Macii, L. Benini and D. J. Pagliari,
Pubblicato in: IEEE Transactions on Emerging Topics in Computing, 2023, ISSN 2168-6750
Editore: IEEE
DOI: 10.1109/TETC.2023.3322033

Clash-of-Leges: A bilingual dataset for conflict detection and explanation in statutory law

Autori: Paolo Italiani; Gianluca Moro; Luca Ragazzi
Pubblicato in: Expert Systems with Applications, 2026, ISSN 1873-6793
Editore: Elsevier
DOI: 10.1016/J.ESWA.2025.130182

Deeploy: Enabling Energy-Efficient Deployment of Small Language Models on Heterogeneous Microcontrollers

Autori: Moritz Scherer 0001; Luka Macan; Victor J. B. Jung; Philip Wiese; Luca Bompani; Alessio Burrello; Francesco Conti 0001; Luca Benini
Pubblicato in: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2024, ISSN 1937-4151
Editore: Institute of Electrical and Electronics Engineers Inc.
DOI: 10.48550/ARXIV.2408.04413

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Autori: Henri Lunnikivi; Zakaria Madaoui; Pawel Dzialo; Per Lindgren
Pubblicato in: IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2025, ISSN 1063-8210
Editore: Institute of Electrical and Electronics Engineers Inc.
DOI: 10.1109/TVLSI.2025.3595712

MARLIN: A Co-Design Methodology for Approximate ReconfigurabLe Inference of Neural Networks at the Edge

Autori: Guella, Flavia; Valpreda, Emanuele; Caon, Michele; Masera, Guido; Martina, Maurizio
Pubblicato in: IEEE Transactions on Circuits and Systems I: Regular Papers, 2024, ISSN 1558-0806
Editore: IEEE
DOI: 10.1109/tcsi.2024.3365952

A 3 TOPS/W RISC-V Parallel Cluster for Inference of Fine-Grain Mixed-Precision Quantized Neural Networks

Autori: Nadalini, A; Rutishauser, G; Burrello, A; Bruschi, N; Garofalo, A; Benini, L; Conti, F; Rossi, D
Pubblicato in: 2023 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 2023, ISSN 2159-3477
Editore: IEEE
DOI: 10.48550/arxiv.2307.01056

Keelhaul: Processor-Driven Chip Connectivity and Memory Map Metadata Validator for Large Systems-on-Chip

Autori: Henri Lunnikivi, Roni Hämäläinen, Timo D. Hämäläinen
Pubblicato in: IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Numero 32, 2024, ISSN 1063-8210
Editore: Institute of Electrical and Electronics Engineers (IEEE)
DOI: 10.1109/TVLSI.2024.3454431

Yun: An Open-Source, 64-Bit RISC-V-Based Vector Processor With Multi-Precision Integer and Floating-Point Support in 65-nm CMOS

Autori: Matteo Perotti; Matheus A. Cavalcante; Alessandro Ottaviano; Jiantao Liu; Luca Benini
Pubblicato in: IEEE Transactions on Circuits and Systems II: Express Briefs, 2023, ISSN 1549-7747
Editore: Institute of Electrical and Electronics Engineers Inc.
DOI: 10.3929/ETHZ-B-000638804

The Quest for Efficient ASCON Implementations: A Comprehensive Review of Implementation Strategies and Challenges

Autori: Mirigaldi, Mattia; Piscopo, Valeria; Martina, Maurizio; Masera, Guido
Pubblicato in: Chips, 2025, ISSN 2674-0729
Editore: MDPI / MDPI AG
DOI: 10.3390/CHIPS4020015

Legal lay summarization: exploring methods and data generation with large language models

Autori: Gianluca Moro; Leonardo David Matteo Magnani; Luca Ragazzi
Pubblicato in: Artificial Intelligence Review, 2025, ISSN 1573-7462
Editore: Springer Nature / Springer
DOI: 10.1007/S10462-025-11392-7

MATCH: Model-Aware TVM-Based Compilation for Heterogeneous Edge Devices

Autori: Hamdi, Mohamed Amine; Daghero, Francesco; Sarda, Giuseppe Maria; Van Delm, Josse; Symons, Arne; BENINI, LUCA; Verhelst, Marian; JAHIER PAGLIARI, DANIELE; Burrello, Alessio
Pubblicato in: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2025, ISSN 1937-4151
Editore: Institute of Electrical and Electronics Engineers Inc.
DOI: 10.48550/ARXIV.2410.08855

CHIMERA: Cryptographic Hardware for Integrated Multipurpose Engine on RISC-V with ASCON

Autori: Dolmeta,Alessandra; Piscopo,Valeria; Martina,Maurizio; Masera,Guido
Pubblicato in: 2025 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 2025, ISSN 2159-3477
Editore: Institute of Electrical and Electronics Engineers Inc.
DOI: 10.1109/ISVLSI65124.2025.11130264

RISC-V Based Keccak Co-Processor for NIST Post-Quantum Cryptography Standards

Autori: Dolmeta, Alessandra; Piscopo, Valeria; Mirigaldi, Mattia; Martina, Maurizio; Masera, Guido
Pubblicato in: 2025 IEEE International Symposium on Circuits and Systems (ISCAS), 2025, ISSN 0271-4302
Editore: IEEE
DOI: 10.1109/ISCAS56072.2025.11043433

Future Generation Computer Systems

Autori: Nadalini, Davide; Rusci, Manuele; Benini, Luca; Conti, Francesco
Pubblicato in: Future Generation Computer Systems, 2023, ISSN 0167-739X
Editore: Elsevier BV
DOI: 10.48550/ARXIV.2305.19167

Read Between the Tokens: Differentiable Text Pruning via Perturbed Top-k Selection

Autori: Paolo Italiani; Luca Ragazzi; Gianluca Moro
Pubblicato in: IEEE Transactions on Audio, Speech and Language Processing, 2025, ISSN 2998-4173
Editore: Institute of Electrical and Electronics Engineers Inc.
DOI: 10.1109/TASLPRO.2025.3629289

ControlPULPlet: A Flexible Real-time Multi-core RISC-V Controller for 2.5D Systems-in-package

Autori: Alessandro Ottaviano; Robert Balas; Tim Fischer 0001; Thomas Benz; Andrea Bartolini; Luca Benini
Pubblicato in: CoRR, 2024, ISSN 2331-8422
Editore: Cornell University
DOI: 10.48550/ARXIV.2410.15985

Ara2: Exploring Single- and Multi-Core Vector Processing With an Efficient RVV 1.0 Compliant Open-Source Processor

Autori: Matteo Perotti; Matheus A. Cavalcante; Renzo Andri; Lukas Cavigelli; Luca Benini
Pubblicato in: IEEE Transactions on Computers, 2024, ISSN 1557-9956
Editore: Institute of Electrical and Electronics Engineers Inc.
DOI: 10.48550/ARXIV.2311.07493

Sensors

Autori: Valeria Piscopo; Alessandra Dolmeta; Mattia Mirigaldi; Maurizio Martina; Guido Masera
Pubblicato in: Sensors, 2025, ISSN 1424-8220
Editore: MDPI / MDPI AG
DOI: 10.3390/S25061678

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Autori: Kari Hepola; Tharaka Ranasinghe Arachchige; Joonas Multanen; Pekka Jääskeläinen
Pubblicato in: IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2025, ISSN 1063-8210
Editore: Institute of Electrical and Electronics Engineers Inc.
DOI: 10.1109/TVLSI.2025.3586902

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Autori: M. Risso; A. Burrello; D. Jahier Pagliari
Pubblicato in: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2025, ISSN 0278-0070
Editore: Institute of Electrical and Electronics Engineers Inc.
DOI: 10.48550/ARXIV.2409.18566

Joint Pruning and Channel-Wise Mixed-Precision Quantization for Efficient Deep Neural Networks

Autori: Motetti, Beatrice Alessandra; Risso, Matteo; Burrello, Alessio; MACII, Enrico; Poncino, Massimo; JAHIER PAGLIARI, DANIELE
Pubblicato in: IEEE Transactions on Computers, 2024, ISSN 1557-9956
Editore: Institute of Electrical and Electronics Engineers Inc.
DOI: 10.48550/ARXIV.2407.01054

AutoCC: Automatic Discovery of Covert Channels in Time-Shared Hardware

Autori: Marcelo Orenes-Vera; Hyunsung Yun; Nils Wistoff; Gernot Heiser; Luca Benini; David Wentzlaff; Margaret Martonosi
Pubblicato in: 56th Annual IEEE/ACM International Symposium on Microarchitecture, 2023, ISSN 2379-3155
Editore: Association for Computing Machinery
DOI: 10.3929/ETHZ-B-000647332

Optimizing the Deployment of Tiny Transformers on Low-Power MCUs

Autori: Victor Jean-Baptiste Jung; Alessio Burrello; Moritz Scherer 0001; Francesco Conti 0001; Luca Benini
Pubblicato in: IEEE Transactions on Computers, 2025, ISSN 1557-9956
Editore: Institute of Electrical and Electronics Engineers Inc.
DOI: 10.48550/ARXIV.2404.02945

ControlPULP: A RISC-V On-Chip Parallel Power Controller for Many-Core HPC Processors with FPGA-Based Hardware-In-The-Loop Power and Thermal Emulation

Autori: Ottaviano, Alessandro; Balas, Robert; Bambini, Giovanni; Del Vecchio, Antonio; Ciani, Maicol; Rossi, Davide; Benini, Luca; Bartolini, Andrea
Pubblicato in: International Journal of Parallel Programming, 2023, ISSN 1573-7640
Editore: nternational Journal of Parallel Programming
DOI: 10.21203/rs.3.rs-2525734/v1

<i>Xvpfloat</i>: RISC-V ISA Extension for Variable Extended Precision Floating Point Computation

Autori: Eric Guthmuller; César Fuguet; Andrea Bocco; Jérôme Fereyre; Riccardo Alidori; Ihsane Tahir; Yves Durand
Pubblicato in: IEEE Transactions on Computers, 2024, ISSN 1557-9956
Editore: IEEE
DOI: 10.1109/tc.2024.3383964

IEEE Transactions on Nuclear Science

Autori: Michael Rogenmoser; Philip Wiese; Bruno Endres Forlin; Frank K. Gürkaynak; Paolo Rech; Alessandra Menicucci; Marco Ottavi; Luca Benini
Pubblicato in: IEEE Transactions on Nuclear Science, 2025, ISSN 0018-9499
Editore: Institute of Electrical and Electronics Engineers Inc.
DOI: 10.3929/ETHZ-B-000736759

Unleashing OpenTitan’s Potential: a Silicon-Ready Embedded Secure Element for Root of Trust and Cryptographic Offloading

Autori: Maicol Ciani; Emanuele Parisi; Alberto Musa; Francesco Barchi; Andrea Bartolini; Ari Kulmala; Rafail Psiakis; Angelo Garofalo; Andrea Acquaviva; Davide Rossi 0001
Pubblicato in: ACM Transactions on Embedded Computing Systems, 2025, ISSN 1558-3465
Editore: Association for Computing Machinery
DOI: 10.48550/ARXIV.2406.11558

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Autori: Robert Balas; Alessandro Ottaviano; Luca Benini
Pubblicato in: IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2024, ISSN 1063-8210
Editore: Institute of Electrical and Electronics Engineers Inc.
DOI: 10.48550/ARXIV.2311.08320

IEEE Transactions on Circuits and Systems I: Regular Papers

Autori: Luca Valente; Alessandro Nadalini; Asif Hussain Chiralil Veeran; Mattia Sinigaglia; Bruno Sá; Nils Wistoff; Yvan Tortorella; Simone Benatti; Rafail Psiakis; Ari Kulmala; Baker Mohammad; Sandro Pinto 0001; Daniele Palossi; Luca Benini; Davide Rossi 0001
Pubblicato in: IEEE Transactions on Circuits and Systems I: Regular Papers, 2024, ISSN 1549-8328
Editore: Institute of Electrical and Electronics Engineers Inc.
DOI: 10.48550/ARXIV.2401.03531

Safe Robot Control using Occupancy Grid Map-based Control Barrier Function (OGM-CBF)

Autori: Golnaz Raja; Teemu Mökkönen; Reza Ghabcheloo
Pubblicato in: CoRR, 2024, ISSN 2331-8422
Editore: Cornell University
DOI: 10.48550/ARXIV.2405.10703

Spatz: Clustering Compact RISC-V-Based Vector Units to Maximize Computing Efficiency

Autori: Perotti, Matteo; Riedel, Samuel; Cavalcante, Matheus; BENINI, LUCA
Pubblicato in: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2025, ISSN 1937-4151
Editore: Institute of Electrical and Electronics Engineers Inc.
DOI: 10.48550/ARXIV.2309.10137

IEEE Transactions on Emerging Topics in Computing

Autori: Alessio Burrello; Matteo Risso; Beatrice Alessandra Motetti; Enrico Macii; Luca Benini; Daniele Jahier Pagliari
Pubblicato in: IEEE Transactions on Emerging Topics in Computing, 2024, ISSN 2168-6750
Editore: Institute of Electrical and Electronics Engineers Inc. / IEEE Computer Society
DOI: 10.48550/ARXIV.2310.07217

Fault-Resistant Partitioning of Secure CPUs for System Co-Verification against Faults

Autori: Simon Tollec; Vedad Hadzic; Pascal Nasahl; Mihail Asavoae; Roderick Bloem; Damien Couroussé; Karine Heydemann; Mathieu Jan; Stefan Mangard
Pubblicato in: IACR Transactions on Cryptographic Hardware and Embedded Systems, 2024, ISSN 2569-2925
Editore: Ruhr University Bochum
DOI: 10.46586/TCHES.V2024.I4.179-204

Marsellus: A Heterogeneous RISC-V AI-IoT End-Node SoC With 2–8 b DNN Acceleration and 30%-Boost Adaptive Body Biasing

Autori: Francesco Conti; Gianna Paulin; Angelo Garofalo; Davide Rossi; Alfio Di Mauro; Georg Rutishauser; Gianmarco Ottavi; Manuel Eggiman; Hayate Okuhara; Luca Benini
Pubblicato in: IEEE Journal of Solid-State Circuits, 2024, ISSN 1558-173X
Editore: IEEE
DOI: 10.48550/arxiv.2305.08415

Insights from Basilisk: Are Open-Source EDA Tools Ready for a Multi-Million-Gate, Linux-Booting RV64 SoC Design?

Autori: Philippe Sauter; Thomas Benz; Paul Scheffler; Frank K. Gürkaynak; Luca Benini
Pubblicato in: CoRR, 2024
Editore: ETH Zurich Research Collection / ETH Library
DOI: 10.48550/ARXIV.2405.04257

Cheshire: A Lightweight, Linux-Capable RISC-V Host Platform for Domain-Specific Accelerator Plug-In

Autori: Alessandro Ottaviano; Thomas Benz; Paul Scheffler; Luca Benini
Pubblicato in: IEEE Transactions on Circuits and Systems II: Express Briefs, 2023, ISSN 1558-3791
Editore: IEEE
DOI: 10.3929/ethz-b-000638551

Predicting Protein Functions with Ensemble Deep Learning and Protein Language Models

Autori: Giacomo Frisoni; Marcello Fuschi; Gianluca Moro
Pubblicato in: Frontiers in Artificial Intelligence and Applications ISBN: 9781643686318, 2025
Editore: IOS Press / IOS Press BV
DOI: 10.3233/FAIA251439

fence.t.s: Closing Timing Channels in High-Performance Out-of-Order Cores Through ISA-Supported Temporal Partitioning

Autori: Wistoff, Nils; Heiser, Gernot; Benini, Luca; id_orcid0000-0001-8068-3806
Pubblicato in: Applications in Electronics Pervading Industry, Environment and Society, 2025
Editore: Springer, Cham
DOI: 10.48550/ARXIV.2409.07576

Exploring the New CV-X-IF Interface to Customize RISC-V Instruction Sets: A Case of Study in Cryptography

Autori: Dolmeta, Alessandra; Martina, Maurizio; Masera, Guido
Pubblicato in: Lecture Notes in Electrical Engineering ISBN: 9783031840999, 2025
Editore: Springer, Cham
DOI: 10.1007/978-3-031-84100-2_5

Magic Mirror on the Wall, Which Is the Fairest Prompt of All? A Survey on Automatic Prompt Learning

Autori: Stefano Fantazzini; Giacomo Frisoni; Gianluca Moro; Luca Ragazzi; Mario Ciccioni; Claudio Sartori 0001
Pubblicato in: Frontiers in Artificial Intelligence and Applications ISBN: 9781643686318, 2025
Editore: IOS Press / IOS Press BV
DOI: 10.3233/FAIA251343

Accelerating Depthwise Separable Convolutions on Ultra-Low-Power Devices

Autori: Daghero, Francesco; Burrello, Alessio; Poncino, Massimo; Macii, Enrico; Jahier Pagliari, Daniele
Pubblicato in: Lecture Notes in Computer Science ISBN: 9783031783760, 2025
Editore: Springer, Cham / Springer Nature Switzerland
DOI: 10.48550/ARXIV.2406.12478

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