Boosting the European Value Chain for Sustainable Power Electronics

Información del proyecto

FastLane

Identificador del acuerdo de subvención: 101139788

DOI

10.3030/101139788

Fecha de la firma de la CE 22 Mayo 2024

Fecha de inicio 1 Mayo 2024

Fecha de finalización 30 Abril 2027

Financiado con arreglo a

• Digital, Industry and Space

Coste total

€ 96 869 925,89

Aportación de la UE

€ 23 002 522,05

Coordinado por

VALEO ELECTRIFICATION SAS
France

CORDIS proporciona enlaces a los documentos públicos y las publicaciones de los proyectos de los programas marco HORIZONTE.

Los enlaces a los documentos y las publicaciones de los proyectos del Séptimo Programa Marco, así como los enlaces a algunos tipos de resultados específicos, como conjuntos de datos y «software», se obtienen dinámicamente de OpenAIRE .

Resultado final

Documents, reports (1)

Data Management Plan

First version of the data management plan (DMP), with description of methods and processes to manage the relevant research data to make them findable, accessible, interoperable and reusable

Websites, patent fillings, videos etc. (1)

Project Website

Setup of the FASTLANE project website

Publicaciones

Conference proceedings (22)

Analýza výsledkov cyklického výkonového testu MOS tranzistora podporená 3D elektrotepelnými simuláciami

Autores: P. Suhaj, A. Chvala,
Publicado en: """Studentská vedecká a odborná činnost’ (ŠVOČ), 2025""", 2025
Editor: ŠVOČ
DOI: 10.5281/ZENODO.15774808

Implementácia meracieho systému pre testovanie spoľahlivosti výkonových prvkov

Autores: M. Hraňo, A. Chvála,
Publicado en: """Studentská vedecká a odborná činnost’ (ŠVOČ), 2026""", 2026
Editor: ŠVOČ

Design of Packaging of Power DMOS Transistor

Autores: P. Príbytný, A. Chvála, J. Marek
Publicado en: International Conference on Advances in Electronic and Photonic Technologies (ADEPT), 2024
Editor: Zenodo
DOI: 10.5281/ZENODO.14974727

Neural Network for Calibration of Electrical Models of Semiconductor Devices

Autores: M. Amira, A. Chvála
Publicado en: 2024 15th International Conference on Advanced Semiconductor Devices and Microsystems (ASDAM), 2025
Editor: IEEE
DOI: 10.1109/ASDAM63148.2024.10844606

Design of Power SiC Transistor Embedded in PCB Supported by 3D Simulations

Autores: A. Chvála, J. Marek
Publicado en: International Conference on Advances in Electronic and Photonic Technologies (ADEPT), 2024
Editor: Zenodo
DOI: 10.5281/ZENODO.14974467

Semiconductor-Focused Simulation Environment for Emitted Noise Sensitivity of MOSFET Parameters

Autores: Robert Kragl, Steffen Beushausen, Karl Oberdieck, Konstantin Spanos, Ingmar Kallfass
Publicado en: 2025 International Symposium on Electromagnetic Compatibility – EMC Europe, 2025
Editor: IEEE
DOI: 10.1109/EMCEUROPE61644.2025.11176251

Optimization of Packaging for Power DMOS Transistor

Autores: P. Pribytný, M. Amira, J. Marek, A. Chvála
Publicado en: 13th International Conference on Advances in Electronic and Photonic Technologies, 2025, 2025
Editor: ADEPT
DOI: 10.5281/ZENODO.15774710

Neural Network-Based Calibration of Electrical Models for MOSFETs and Diode

Autores: M. Amira, A. Chvala
Publicado en: ELITECH`25 27th Conference of Doctoral Students Faculty of Electrical Engineering and Information Technology, 2025
Editor: ELITECH`26
DOI: 10.5281/ZENODO.15774850

TCAD Study on Parallel SiC Two-Pole SSCB Chips Integrated into a 900 V Power Module

Autores: M. Keck, N. Boettcher, R. Domes, J. Lindner, H. Rauh and J. Schulze
Publicado en: International Conference on Integrated Power Electronics (CIPS), Dresden, Germany, 2026
Editor: IEEE

Plasma Behavior of SiC MOSFETs with Engineered Substrates During Reverse Recovery

Autores: Alaluss, Mohamed; Mysore, Madhu Lakshman; Herrmann, Clemens; Goel, Shubhanshu; Elsayed, Ahmed; Basler, Thomas
Publicado en: 2025 37th International Symposium on Power Semiconductor Devices and ICs (ISPSD), 2025
Editor: IEEE
DOI: 10.23919/ISPSD62843.2025.11117512

FastLane: Life Cycle Analysis of SiC from Substrate to Converter

Autores: Elise Chaumat
Publicado en: Nanoelec Symposium on Sustainable Electronics and Digital Technologies, 2024
Editor: Zenodo
DOI: 10.5281/ZENODO.14988627

A Novel Design Variation of a Monolithically Integrated SiC Circuit Breaker

Autores: A. Hartmann, N. Boettcher
Publicado en: International Convention on Information and Communication Technology, Electronics and Microelectronics, 2025
Editor: IEEE
DOI: 10.5281/ZENODO.15681864

Design of Power SiC Transistor Embedded in PCB Supported by 3D Thermo-Mechanical Simulations

Autores: A. Chvála, P. Suhaj, M. Florovič, J. Marek
Publicado en: 2024 15th International Conference on Advanced Semiconductor Devices and Microsystems (ASDAM), 2025
Editor: IEEE
DOI: 10.1109/ASDAM63148.2024.10844645

Active Voltage Probe for Direct Measurement of EMC-Relevant Noise of Power Semiconductors

Autores: Robert Kragl, Konstantin Spanos, Karl Oberdieck, Steffen Beushausen, Ingmar Kallfass
Publicado en: 2025 IEEE Energy Conversion Conference Congress and Exposition (ECCE), 2025
Editor: IEEE
DOI: 10.1109/ECCE58356.2025.11259863

Design of Packaging of Power DMOS Transistor

Autores: P. Príbytný, M. Amira, J. Marek, A. Chvála
Publicado en: 2024 15th International Conference on Advanced Semiconductor Devices and Microsystems (ASDAM), 2025
Editor: IEEE
DOI: 10.1109/ASDAM63148.2024.10844597

Neural Network-Based Calibration of Electrical Models for Silicon Carbide Diodes

Autores: M. Amira, A. Chvála
Publicado en: WOCSDICE-EXMATEC, 2025, Cadiz, Spain 16-20 June 2025, 2025
Editor: WOCSDICE-EXMATEC
DOI: 10.5281/ZENODO.20024223

Thermal Simulation with Model Order Reduction for Improved Computational Speed

Autores: A. Chvala, M. Florovic, J. Marek
Publicado en: 13th International Conference on Advances in Electronic and Photonic Technologies, 2025, 2025
Editor: ADEPT
DOI: 10.5281/ZENODO.15774465

"Effiziente SiC-Leistungsmodule – Herausforderungen und Lösungsansätze zum großflächigen Silber-Sintern von ""Active Metal Brazed""- Substraten auf Aluminium-Bodenplatten"

Autores: Sebastian Fritzsche, Katja Stenger, Felix Koser, Noah Glaab, Benjamin Fabian, Florian Seifert
Publicado en: The 13th DVS/GMM Conference EBL 2026, 2026
Editor: EBL 2026
DOI: 10.5281/ZENODO.18983130

Analysis of Power Cyclic Test Results of Power MOS Transistor Supported by 3D Electro-Thermal Simulations

Autores: P. Suhaj, A. Chvala
Publicado en: 13th International Conference on Advances in Electronic and Photonic Technologies, 2025, 2025
Editor: ADEPT
DOI: 10.5281/ZENODO.15774774

Improving Device Behavior Prediction Using Neural Networks for MOSFET and Diode Modeling

Autores: M. Amira, A. Chvála
Publicado en: 7th International Conference on Microelectronic Devices and Technologies, (MicDAT 2025), 2025
Editor: IFSA Publishing
DOI: 10.13140/RG.2.2.25110.61767

Measurements at High Temperature for Thermal Resisstance of MOSFETs

Autores: C. R. Mitulescu (Sandulescu), N. Codreanu, C. Ionescu, P. Svasta, M. Branzei, B. Enache
Publicado en: 25th European Microelectronics and Packaging Conference&Exibition (EMPC), 2025, ISBN 9798331565756
Editor: IEEE

Impact of Switching Behavior on the Noise Emission of Power Semiconductors

Autores: Robert Kragl, Karl Oberdieck, Konstantin Spanos, Steffen Beushausen, Ingmar Kallfass
Publicado en: 2024 IEEE 9th Southern Power Electronics Conference (SPEC), 2025
Editor: IEEE
DOI: 10.1109/SPEC62217.2024.10893134

Peer reviewed articles (1)

Introducing a modified sample preparation and straightforward elemental ratio determination strategy with LA-ICP-MS to expand the nanoparticle probing toolkit

Autores: Olga Lanaridi, Yan Chen, Jakob Nils Blaschke, Pablo Ayala, Bernhard C. Bayer, Dominik Eder, Andreas Limbeck
Publicado en: Advances in Sample Preparation, Edición 16, 2025, ISSN 2772-5820
Editor: Elsevier BV
DOI: 10.1016/J.SAMPRE.2025.100223