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A Hardware-Aware AI Execution Framework for Edge AI Accelerators

Project description

An automated framework for the future of Edge AI

In the past decade, edge computing and AI have gained popularity, leading to increased interest in developing both technologies. While the full automation of the healthcare industry and consumer electronics will rely on edge AI, progress has been slow due to delays in hardware-accelerator innovations. The ERC-funded Aigen Tech project aims to introduce new methodologies and tools to build an automated framework for efficiently generating and developing AI accelerators and AI workload mappings, massively reducing hardware design cycles while optimising efficiency. Finally, the project will validate and prototype the framework to encourage collaboration with business partners.

Objective

Edge AI is poised to transform industries like healthcare, automation, and consumer electronics, but the rapid evolution of AI models clashes with the slow, rigid development of hardware accelerators. Custom accelerators, while efficient, take over a year to design, making them obsolete by the time they are deployed. Existing solutions also suffer from manual compiler customization and inefficient workload mappings, leading to wasted energy and increased latency.
Building on the tools and methodologies developed in the ERC BINGO project, AigenTech tackles this challenge with an automated framework for exploring and generating AI accelerators, and automatically mapping and compiling AI workloads onto them, enabling rapid adaptation to new workloads. By integrating design space exploration, hardware generation, deep layer fusion mapping, and MLIR-based compilation, AigenTech reduces hardware design cycles from months to weeks and maximizes execution efficiency.
This PoC will validate the framework through FPGA prototyping and industry benchmarking, create a web-based exploration platform prototype and engage our established and new semiconductor partners to pave the way for commercialization. As such, AigenTech will enable them to rapidly support future AI developments at high hardware efficiency, while reducing time-to-market.

Fields of science (EuroSciVoc)

Programme(s)

Topic(s)

Funding Scheme

HORIZON-ERC-POC - HORIZON ERC Proof of Concept Grants

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Call for proposal

(opens in new window) ERC-2025-POC

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Host institution

KATHOLIEKE UNIVERSITEIT LEUVEN
Net EU contribution
€ 150 000,00
Address
OUDE MARKT 13
3000 Leuven
Belgium
Region
Vlaams Gewest Prov. Vlaams-Brabant Arr. Leuven
Activity type
Higher or Secondary Education Establishments
Links
Total cost
No data

Beneficiaries (1)