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Content archived on 2024-06-18

Efficient Silicon Multi-Chip System-in-Package Integration - Reliability, Failure Analysis and Test

Objective

The ENIAC JU project ESiP is addressing the issues of reliability, failure analysis and testing in innovative system-in-package (SiP) solutions. Highly integrated systems with greater miniaturisation and increased functionality open new markets and improve the quality of life through a wide range of applications. In particular, higher systems integration technologies using multi-chip packaging, through-silicon via technologies or package-stacking approaches are growing in importance. Market studies show that SiP devices will have an average growth of 10 to 20% per year over the next five years.

Fields of science

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Call for proposal

ENIAC-2009-1
See other projects for this call

Coordinator

INFINEON TECHNOLOGIES AG
EU contribution
€ 634 152,00
Address
AM CAMPEON 1-15
85579 Neubiberg
Germany

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Region
Bayern Oberbayern München, Landkreis
Activity type
Private for-profit entities (excluding Higher or Secondary Education Establishments)
Administrative Contact
Links
Total cost
No data

Participants (39)