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Efficient Silicon Multi-Chip System-in-Package Integration - Reliability, Failure Analysis and Test

Objectif

The ENIAC JU project ESiP is addressing the issues of reliability, failure analysis and testing in innovative system-in-package (SiP) solutions. Highly integrated systems with greater miniaturisation and increased functionality open new markets and improve the quality of life through a wide range of applications. In particular, higher systems integration technologies using multi-chip packaging, through-silicon via technologies or package-stacking approaches are growing in importance. Market studies show that SiP devices will have an average growth of 10 to 20% per year over the next five years.

Champ scientifique (EuroSciVoc)

Programme(s)

Thème(s)

Appel à propositions

ENIAC-2009-1
Voir d’autres projets de cet appel

Régime de financement

JTI-CP-ENIAC - Joint Technology Initiatives - Collaborative Project (ENIAC)

Coordinateur

INFINEON TECHNOLOGIES AG
Contribution de l’UE
€ 634 152,00
Adresse
AM CAMPEON 1-15
85579 Neubiberg
Allemagne
Région
Bayern Oberbayern München, Landkreis
Type d’activité
Private for-profit entities (excluding Higher or Secondary Education Establishments)
Liens
Coût total
Aucune donnée

Participants (39)