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Specialisable, Programmable, Efficient and Robust Microprocessors

Cel

The development of faster, cheaper and smaller transistors has been the driving force behind the exponential growth in computing power over the past 50 years. While our ability to fabricate better transistors has not yet ceased, continuing to translate these advances into better system-level performance is now a major challenge. This proposal seeks to research a new approach to building programmable digital systems, one that can offer the efficiency, robustness and flexibility required as we approach the end of the CMOS era and start to introduce new post-CMOS technologies. The ideas are centred upon a novel network-centric multiprocessor architecture, with contributions planned at every level from the circuit to the language level.

Zaproszenie do składania wniosków

ERC-2012-StG_20111012
Zobacz inne projekty w ramach tego zaproszenia

System finansowania

ERC-SG - ERC Starting Grant

Instytucja przyjmująca

THE CHANCELLOR MASTERS AND SCHOLARS OF THE UNIVERSITY OF CAMBRIDGE
Wkład UE
€ 1 271 216,00
Adres
TRINITY LANE THE OLD SCHOOLS
CB2 1TN Cambridge
Zjednoczone Królestwo

Zobacz na mapie

Region
East of England East Anglia Cambridgeshire CC
Rodzaj działalności
Higher or Secondary Education Establishments
Kierownik naukowy
Robert Mullins (Dr.)
Kontakt administracyjny
Renata Schaeffer (Ms.)
Linki
Koszt całkowity
Brak danych

Beneficjenci (1)