TCLS ARM for space
Autores:
Jean-Luc Poupat; Benoit Leroy, Tim Helfers
Publicado en:
EUROSPACE - DASIA 2016 - The International Space System Engineering Conference, 2016
Editor:
Airbus Defence and Space SAS - Airbus DS GmbH
TCLS arm for space
Autores:
Jean-Luc Poupat; Benoit Leroy, Tim Helfers
Publicado en:
EUROSPACE - DASIA 2015 - The International Space System Engineering Conference, 2015
Editor:
Airbus Defence and Space SAS - Airbus DS GmbH
Triple Core Lock Step (TCLS) ARM FOR SPACE
Autores:
XabierIturbe, Balaji Venu, EmreOzer
Publicado en:
ADCSS 2016 - European Space Research and Technology Centre (ESTEC), 2016
Editor:
ARM
Soft error vulnerability assessment of the real-time safety-related ARM Cortex-R5 CPU
(se abrirá en una nueva ventana)
Autores:
Xabier Iturbe, Balaji Venu, Emre Ozer
Publicado en:
2016 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), 2016, Página(s) 91-96, ISBN 978-1-5090-3623-3
Editor:
IEEE
DOI:
10.1109/DFT.2016.7684076
A Triple Core Lock-Step (TCLS) ARM® Cortex®-R5 Processor for Safety-Critical and Ultra-Reliable Applications
(se abrirá en una nueva ventana)
Autores:
Xabier Iturbe, Balaji Venu, Emre Ozer, Shidhartha Das
Publicado en:
2016 46th Annual IEEE/IFIP International Conference on Dependable Systems and Networks Workshop (DSN-W), 2016, Página(s) 246-249, ISBN 978-1-5090-3688-2
Editor:
IEEE
DOI:
10.1109/DSN-W.2016.57
A Fail-Functional Automotive CPU Subsystem Architecture for Mitigating Single Point of Failures
Autores:
Balaji Venu, EmreOzer, Xabier Iturbe, Alex Robinson
Publicado en:
IEEE International Workshop on Automotive Reliability & Test, 2016
Editor:
IEEE