Resultado final
Report on fault injection
Report on fault injection Static analysis evaluation of SEE and MCU sensitiveness Check the robustness of the FPGA by implementing a critical design, adding the new SEE monitoring function and checking them by injecting errors at HW level Analysis and recommendation of the FPGA behavior concerning in-flight usage Analyze fault injection experiments contrasted with radiation effects experiments over the same circuits
AGGA4 Portability Performance ReportGNSS receiver IP portability assessment: Revision and optimization of VHDL code to match the target FPGAs and use their specific HW resources VHDL simulations to assess the integrity of the design after VHDL rework Synthesis, Place and Route the design for the target FPGAs Timing, integration and electrical performances measurement on Evaluation Board for critical functions Performance analysis, speed, area, consumption, comparison with other FPGA technologies Generate the relevant reports
Commercialization exploitation reportData package DELTA ESCC Evaluation
Results on ESSC delta to QML-V qualification flow
IFFT Radix 2 and Radix 4 and Digital Down Converter (DDC) portability studyIFFT Radix 2 and Radix 4 and Digital Down Converter (DDC) portability study Revision and optimization of VHDL code to match the target FPGAs and use their specific HW resources VHDL simulations to assess the integrity of the design after VHDL rework Synthesis, Place and Route the design for the target FPGAs Timing, integration and electrical performances measurement on Evaluation Board for critical functions Performance analysis, speed, area, consumption, comparison with other FPGA technologies Generate the relevant reports
Benchmark analysis for SEU mitigation driven designsBenchmark radiative tests results using Veri-Place features.
Identification of tasks and deliverables leaders reportSpW/FPU/Motor CTL Portability Performance Report
SpW/FPU/Motor CTL Portability Performance Report Revision and optimization of VHDL code to match the target FPGAs and use their specific HW resources VHDL simulations to assess the integrity of the design after VHDL rework Synthesis, Place and Route the design for the target FPGAs Timing, integration and electrical performances measurement on Evaluation Board for critical functions Performance analysis, speed, area, consumption, comparison with other FPGA technologies Generate the relevant reports
Systematic FPGA Functions Validation ReportReport on FPGA functional testing by end-user post IP portability assessment
Final dissemination and exploitation reportCGA625 Assembly Validation Plan
CGA625 Assembly Validation Plan Phase 1 Manufacturing capability: PCB design, Manufacturing activities according to the agreed plan; 2 CGA625 soldering, desoldering, Qualification campaign; vibration and 500 cycles, Verification; micro sections, PCB integrity
Periodic progress report 2Data package QML-V lot 1 qualification CQFP 352
results on QML-V lot 1 qualification flow
Periodic progress report 3Final report
Report of the test vehicles useable for a radiation test using University of Sevilla facilities. Simulate the possible effects over the target technology.Report of the test vehicles useable for a radiation test using University of Sevilla facilities. Simulate the possible effects over the target technology.
Dissemination and exploitation progress reports 2CGA625 Assembly Reliability Report
CGA625 Assembly Reliability Report Phase 2 Verification program: PCB design, Manufacturing activities according to the agreed plan; 4 CGA625 soldering, desoldering, Qualification campaign; vibration and 1500 cycles with electrical monitoring The tests are done with normal CGA 625 FPGA and not daisy chain.
Final reportFinal report covering the full VEGAs activities and results achieved
Dual use report 2Dual use report 1
Perform and reporting of radiation tests
Do the radiative tests and write results report
FPGA Portability, Performance and Package Assembly Summary reportFPGA Portability, Performance and Package Assembly Summary report Final report on FPGA performance and reliability
Analyze the obtained resultsAnalyze results on fault injection + radiative test
Dissemination and exploitation plan presentationData package characterization report
Report on full characterisation under QML-V flow
Report on developed IPsIPs to be developped for NanoXmap software DSP integration with high level tools (SimuLink) DDR3 Dual clock FIFO
Dissemination and exploitation progress reports 1Development of an operative platform adapted to the FPGA for Fault Injection.
An operative platform suitable for radiation testing of the Brave FPGAFinal operative platform adapted to BRAVE FPGA
Publicaciones
Autores:
Maria Muñoz-Quijada, Luis Sanz, Hipolito Guzman-Miranda
Publicado en:
Electronics, Edición 9/12, 2020, Página(s) 2104, ISSN 2079-9292
Editor:
Electronics (MDPI)
DOI:
10.3390/electronics9122104
Autores:
Maria Muñoz-Quijada, Samuel Sanchez-Barea, Daniel Vela-Calderon, Hipolito Guzman-Miranda
Publicado en:
Electronics, Edición 8/1, 2019, Página(s) 24, ISSN 2079-9292
Editor:
Electronics (MDPI)
DOI:
10.3390/electronics8010024
Autores:
Maria Muñoz-Quijada, Luis Sanz, Hipolito Guzman-Miranda
Publicado en:
Electronics, Edición 9/12, 2020, Página(s) 1989, ISSN 2079-9292
Editor:
Electronics (MDPI)
DOI:
10.3390/electronics9121989
Autores:
Maria Muñoz-Quijada, Samuel Sanchez-Barea, Daniel Vela-Calderon and Hipolito Guzman-Miranda
Publicado en:
Radiation Tolerant Electronics, 2019
Editor:
Paul Leroux
Autores:
Hipólito Guzmán-Miranda, María Muñoz-Quijada, José R. García-Oya, Jorge Jiménez-Sánchez, Luis Sanz, Fernando Márquez-Lasso, Fernando Muñoz
Publicado en:
5th SEFUW (SpacE FPGA Users Workshop), 2020
Editor:
ESA
Autores:
Hipólito Guzmán-Miranda, María Muñoz-Quijada, Luis Sanz
Publicado en:
4th SEFUW (SpacE FPGA Users Workshop), 2018
Editor:
ESA
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