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Functionally scaled computing technology: From novel devices to non-von Neumann architectures and algorithms for a connected intelligent world

Periodic Reporting for period 3 - Fun-COMP (Functionally scaled computing technology: From novel devices to non-von Neumann architectures and algorithms for a connected intelligent world)

Okres sprawozdawczy: 2021-03-01 do 2022-08-31

The Fun-COMP project aimed to develop a new wave of industry-relevant technologies that will extend the limits facing mainstream processing and storage approaches. We aimed to develop basic information processing building blocks that draw inspiration from biological approaches, providing computing primitives that can mimic the essential features of brain-like synapses and neurons to deliver a new foundation for fast, low-power, functionally-scaled computing based around non-von Neumann approaches.
Fun-COMP's objectives can be summarised as developing functionally-enhanced computing devices and systems that
• Fuse together the core information processing tasks of computing and memory
• At the same time incorporate in hardware (not just in software) the ability to learn, adapt and evolve
• Are designed to take advantage of the huge benefits, in terms of both speed/bandwidth and power consumption, that is available via the use of photonic interconnects and photonic processing
More specifically we aimed to
• Develop key novel computing hardware elements, including neuron and synapse mimics, binary and multilevel memories, arithmetic and computing-in-memory devices
• Combine these components together into architectures that deliver the fundamental building blocks of unconventional non-von-Neumann (N-vN) processors
• Combine these building blocks into topologies that can address
(i) difficult-to-solve (by conventional means) real-world problems -e.g. optimization, correlation, association in ‘big data’
(ii) provide localised, intelligent/adaptable, low-power computing nodes -e.g. for IoT applications.
The work carried out so far, and the acheivements to date, can be summarised as follows:
• We have successfully fabricated a range of SiN and Si non-von Neumann (N-vN) integrated phase-change photonic devices and demonstrated binary and multilevel memory functionality, as well as arithmetic and neuromorphic processing capabilities.
• We have successfully developed (designed, fabricated and tested) a novel mixed-mode N-vN unit cell design in which both readout and switching can be achieved electrically or optically. Binary non-volatile memory functionality was successfully demonstrated using this mixed-mode device.
• We have developed and fabricated microring waveguide devices (i.e. N-vN extended unit cell devices), both with and without integrated phase-change cells, and exploited such devices to provide (i) wavelength division multiplexed coupling devices, (ii) mimics of spiking neurons and (iii) scalable memory and neuromorphic architectures
• We have designed optically pumped (OP) nanolasers for spiking operation based on a single photonic crystal cavity - and successfully fabricated such designs demonstrating experimental spiking for the first time
• We have developed theoretical models for gain/loss coupled semiconductor nanocavities, for the understanding and the prediction of self-pulsing neuron-like regimes.
• We have fabricated the1st generation of OP nanolasers for spiking operation based on a single photonic crystal cavity and coupled nanocavities.
• We have developed a 3D finite element model and (faster, simpler) behavioural models capable of simulating the write, erase and read processes in the N-vN devices.
• We have developed a computationally efficient model describing the nonlinear dynamics of III-V/Silicon hybrid nanolasers
• We have combined Fun-COMP devices (or computing primitives) to deliver (i) small-scale all-optical memory chips , (ii) small-scale all-optical neuromorphic processing chips, (iii) photonic arrays suited to carrying out arithmetic processing (specifically matrix-vector multiplication), (iv) temporal correlation processors, (v) memory-enhanced photonic reservoir computing networks
• We have developed successful approaches to allow transfer of N-vN device and system design to standard Si-photonics fabrication (via ePIXfab Europractice runs)
• We have designed and succesfully fabricated a number of photonic system components, specifically multiplexers and modulators, to allow for the development of re-configurable N-vN computing platforms on the imec (integrated photonics) platform
• We have demonstrated ultra-fast convolutional processing using the Fun-COMP photonic crossbar array system for matrix vector multiplication - with experimental inference speeds exceeding 2 Tera MAC/s and projected (with scale-up) speeds > 1 Peta MAC/s, far outstripping any available electronic approaches.
• We have developed a new approach to spatio-temporal correlation detctions, using Fun-COMP integrated phase-change photonic devices to successfully design and fabricate a photonic correlation processor for temporal correlation in big data (e.g. social media streams, network traffic)
• We successfully integrated Fun-COMP integrated phase-change photonic devices into reservoir computing (RC) systems, so introducting memory and learning into RC systems - demonstrating real-time detection of data patterns using such a phase-change enhanced RC network
• We devised a new, fast and efficient parallel approach to solving combinatorial optimisation problems, using the Fun-COMP matrix-vector processing chip
The work carried out by the Fun-COMP consortium defined the state-of-the-art in the area of intergrated phase-change photonic computing.

Over the duration of the project we published 41 journal papers and 38 conference papers. Many of our papers are in the most prestigious of journals (Nature, Nature Nanotechnology, Science Advances, Advanced Materials, Nano Letters, Optica etc.), and these have generated very high levels of interest and publicity.
Just to give one example (but there are many), our paper in Nature on the Fun-COMP tensor core matrix-vector multiplier system was featured in a special ‘News and Views’ article in Nature itself, and has been reported on by numerous tech websites (41 news outlets, 61tweets, 11 blogs and 4 Wikipedia pages to date), and currently has over 450 cites (google scholar) and an altimetric score of 331. In addition, Fun-COMP partners have increasingly been invited to contribute to key roadmapping and review publications on the future of photonic processing hardware (e.g. the recent review in Nature Photonics, see DOI:10.1038/s41566-020-00754-y; the IoP Roadmap on emerging hardware and technology for machine learning,

Exploitation activity and opportunities arising from the Fun-COMP project are very significant, and include the following:
• Several patents either filed or in the process of filing by various partners, including joint patents
• A spin-out company, Salience Labs, has been founded by Fun-COMP partners (see D5.6)
• Numerous follow-on activities and projects have been established and will help take Fun-COMP technologies up the TRL ladder

The exploitation potential of Fun-COMP technologies is very high and, while there are still many open challenges to meet industrial needs in terms of performance, fabrication cost, scalability, reliability, product-level fabrication, and system integration of Fun-COMP technologies, the unprecedented speed achieved by the photonic technologies developed in Fun-COMP has convinced funding bodies (EU, EPSRC) and investors (Salience Labs) to further exploit them for at least the next 5 years and undoubtedly beyond.
Fun-COMP photonic memory device
Fun-COMP matrix vector multiplication
Fun-COMP all-optical spiking neural network