Descrizione del progetto
Formare ricercatori nell’ambito dei semiconduttori III-V
CMOS è la principale tecnologia commerciale di processo per la produzione di circuiti integrati. Sviluppati nel 1960, i processi CMOS utilizzavano in principio il metallo come conduttore del gate. Oggi, i gate sono realizzati in polisilicio. Si assiste inoltre a un passaggio verso l’ibridazione della funzione in termini di inserimento di sensori, memoria e funzionalità fotonica all’interno dello stesso chip. Nello specifico, è in crescita l’interesse per l’integrazione di materiali III-V e altri semiconduttori complessi che presentano vantaggi rispetto al silicio. Il progetto DESIGN-EID, finanziato dall’UE, affronterà la sfida tecnologica esaminando l’impatto dei difetti sulle prestazioni dei dispositivi elettronici e fotonici. Esso formerà tre ricercatori nella fase iniziale per colmare il divario tra simulazioni predittive, materiali sperimentali e sviluppo dei dispositivi.
Obiettivo
In semiconductor technology and applications today, we are increasingly observing a shift from the pure silicon CMOS technology towards hybridisation of function in terms of bringing in sensors, power, memory and photonics functionality on the same chip. In particular, there is a great interest in the heterogeneous and monolithic integration of III-V materials and other complex semiconductors, such as III-Nitrides and SiC on Si substrate. However, the direct growth of III-V materials on silicon inevitably will lead to crystal defects that significantly decreases performance of novel devices.
To overcome this main technological challenge and to make this new technology financially viable, the most cost-effective and time-effective approach is to combine experimental and simulation work, which indeed is the main aim on this project – DESING-EID. This will be achieved by addressing the following objectives.
The first objective of DESIGN-EID is to train three young ESRs who will bridge the gap between predictive simulations, experimental materials and device development by developing simulation tools for prediction of crystal growth as a function of process conditions. Secondly, completely eliminating defects in compound semiconductors is likely not achievable, therefore a simulation framework providing an accurate evaluation of their impact on device performance will be essential for designing devices and materials minimizing their impact. Furthermore, semiconductor defects in semiconductors may be exploited for their unique electronic properties if their presence and properties are controlled. For example, vacancies might be used to implement Qu-bits, whereas extended defects, such as dislocations, can provide unique transport properties. Hence, the last objective of the DESIGN-EID project focuses on experimental control and accurate simulation of the impact of defects on electronic and photonic device performance.
Campo scientifico
- engineering and technologymaterials engineeringcrystals
- engineering and technologyelectrical engineering, electronic engineering, information engineeringelectronic engineeringcomputer hardwarequantum computers
- natural sciencesphysical scienceselectromagnetism and electronicssemiconductivity
- natural scienceschemical sciencesinorganic chemistrymetalloids
- natural sciencescomputer and information sciencessoftwaresoftware applicationssimulation software
Parole chiave
Programma(i)
Argomento(i)
Meccanismo di finanziamento
MSCA-ITN - Marie Skłodowska-Curie Innovative Training Networks (ITN)Coordinatore
G12 8QQ Glasgow
Regno Unito