qualification of High pErformance pRogrammable Microprocessor and dEvelopment of Software ecosystem

Informacje na temat projektu

HERMES

Identyfikator umowy o grant: 101004203

DOI

10.3030/101004203

Projekt został zamknięty

Data podpisania przez KE 27 Października 2020

Data rozpoczęcia 1 Marca 2021

Data zakończenia 29 Lutego 2024

Finansowanie w ramach

INDUSTRIAL LEADERSHIP - Leadership in enabling and industrial technologies – Space

Koszt całkowity

€ 3 059 001,25

Wkład UE

€ 3 056 751,25

3 056 751,25

2 250,00

Koordynowany przez

NANOXPLORE
France

Periodic Reporting for period 2 - HERMES (qualification of High pErformance pRogrammable Microprocessor and dEvelopment of Software ecosystem)

Okres sprawozdawczy: 2022-03-01 do 2024-02-29

HERMES is the final step to finalize the NG-ULTRA development activity supporting the development of all critical software tools ecosystem and qualifying the NG-ULTRA in ceramic CGA 1752 package.
The HERMES project sets clear and measurable main objectives to reach a TRL 7 from TRL 4 as follows:
1. Development and testing of very complex ceramic hermetic package CGA 1752 – TRL 6 achieved
2. Space ESCC evaluation of the rad-hard FPGA (NG-ULTRA) developed under ESA, CNES and EU projects – TRL 7 achieved
3. Development and validation by end-users of several software tools including BAMBU HLS, Xtratum hypervisor and BL1 – TRL 6 achieved

WP1: Final substrate with Production arrived @ ST; ASSY of the first prototypes in ST Prototyping Line (Grenoble);Successful deployment of the ATE Test HW (Electrical test for Final parts) and Electrical test of the first prototypes (Re-use industrialization activity done on ORGANIC). Delivery of tested prototypes to NX. The column assembly not done.

WP2: Qualification not started. Issue of candidate Final Product Qualification (e–QML) Plan versus latest ESCC evolution done with CNES.

WP3: PandA-Bambu now supports: Functional and loop pipelining, Dataflow architecture and C/C++ Co-simulation. The use-cases evaluation are finalized. Deep learning design flow investigated

WP4: Generated the D4.1 SVS. RTEMS tested according to this SVS. New versions of the software (RTEMS, Linux and XNG) released. XNG ECSS category B delta qualification on-going. PDR review successfully performed. Tools updated according requests from other partners.

WP5: Dissemination on the website and social media have been done. Multiple dissemination activities done by partners: conference, publications, press release and workshop.

• Reduce the dependence on critical technologies and capabilities from outside Europe for future space applications by providing an ITAR free advanced rad-hard FPGA
• Develop or regain in the mid-term the European capacity to operate independently in space with access to new generation of rad-hard FPGA beyond current state of the art
• Enhance the technical capabilities and overall competitiveness of European space industry satellite vendors on the worldwide market by giving prime access to exportation restriction free high performance technologies
• Work package dedicated to the development of a commercial evaluation of the technology with a full range of recurring products. The future rad-hard FPGA will be available in space qualified package and commercial package with a clear pricing strategy to maximise product dissemination outside space markets
• Improve the overall European space technology landscape and complement the activities of European and national space programmes. HERMES is clearly set up to complement the ongoing ESA/CNES BRAVE project
• HERMES will have clear social and environmental impacts by offering a very versatile technology able to meet multiple applications in various markets with the same device. It will also facilitate SMEs access to advance space applications

NG-Ultra

Periodic Reporting for period 2 - HERMES (qualification of High pErformance pRogrammable Microprocessor and dEvelopment of Software ecosystem)

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