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Advanced GeSi components for next-generation silicon photonics applications

Periodic Reporting for period 2 - SIPHO-G (Advanced GeSi components for next-generation silicon photonics applications)

Periodo di rendicontazione: 2023-01-01 al 2024-03-31

By developing 100Gbaud Germanium-Silicon (GeSi) Quantum-Confined Stark-Effect (QCSE) modulators and highly sensitive 100Gbaud avalanche photodetectors (APD), SIPHO-G will bring breakthrough optical modulation and photodetection capability to the world of Silicon Photonics. The newly developed compact, waveguide-coupled modulator and detector building blocks will be monolithically integrated in a high-yield cutting-edge 300mm Silicon Photonics platform, propelling the bandwidth density, power efficiency, sensitivity and complexity of silicon photonic integrated circuits to the next level. Supported by an elaborate simulation and design enablement framework, SIPHO-G will demonstrate an extensive set of application-driven prototypes across the O-band and C- band. By bringing together the entire Silicon Photonics value chain, SIPHO-G will accelerate the development of next-generation co-packaged optics, long-haul optical communications, as well as emerging Photonic Integrated Circuit (PIC) applications such as optical neuromorphic computing, with performance levels of 4x-20x beyond current state-of-the-art.
The Sipho-G project developments are progressing, collaborations among partners are ongoing, and the goals set in the description of action should be achievable by the end of the project.
The development of frameworks to model optical properties of QCSE and APDs is ongoing at NXT and IMEC, and the PDK by LUCEDA. NXT developed a simulation framework for modelling multi-quantum well QCSE devices. The optics simulations including the excitonic absorption were tested against experimental data and the quantum module was updated. IMEC used NXT’s QCSE framework to model the devices grown by IMEC and calibrated the model. NXT conducted sensitivity analysis to identify the effect of variation of quantum well thickness and Ge concentration in the device. IMEC created the simulation framework for APD devices based on Synopsys TCAD software and verified this framework by comparing simulation results with the experimental data from devices fabricated within Sipho-G. LUCE updated their PDK by adding the component models provided by IMEC and by updating compact models using experimental data from IMEC. LUCE and NXT worked together on connecting their software to automate the modelling environment from quantum to circuit level.
AMBEL and IMEC worked on process development to optimize the wafer-scale selective-area epitaxial growth for QCSE and APD devices. AMBEL presents growing strain-balanced Ge/Si multi-quantum-well stacks (MQW) for QCSE EAMs operating in the C-band. IMEC finalized the development of wafer-scale chemical vapor deposition processes for the epitaxy of MQW for the fabrication of QCSE EAM (O-band).
The integration of these components in the silicon photonics integration platform is ongoing at IMEC and designs of integrated components are included in the PIC design vehicle. The first fabrication run was finalized and chips were characterized and distributed to partners. Characterizing the devices on these wafers provided feedback for the processing conditions of the 2nd SiPho-G fabrication run.
The SiPho-G application-oriented demonstrators are spanning from electro-optical engines for Co-Packaged Optics chiplets and 5G Fronthaul networks, to PIC-only datacenter transmitter demos and optical computing engines. The layout designs of three PICs were finalized. The designs involve O-band and C-band variants, based on QCSE and FK-EAMs, respectively. Further to that, a PIC-only design is presented, using WDM multiplexed streams. The first set of results was obtained on the Run#1 PIC-EIC module. The development of the fronthaul evaluation testbed as well as the initial bench tests were done to validate the relevant test methodologies. Finally, testing results obtained by AUTH on the optical computing PICs from Run#1 fabrication of SiPho-G are available consisting of a 1×2 neuron and a 2×2 Xbar Electro Absorption Modulators (EAMs) layouts.
Sipho-G results have been published in about 25 scientific conferences/journals and a plan for future publications has been prepared.
SIPHO-G brings together a comprehensive consortium that will complement today’s SiPho toolbox with the much desired advanced modulator and photodetector building blocks, in the form of the waveguide-integrated Quantum-Confined Stark Effect (QCSE) modulator, and Separate-Absorption-Charge-Multiplication (SACM) APDs. Both devices will be implemented using wafer-scale monolithic epitaxial growth of highly crafted Ge/Si layer stacks, using chemical-vapor deposition (CVD) epitaxial reactors already available in mainstream CMOS foundries, guaranteeing straightforward introduction into future products by leveraging existing supply chains. In order to demonstrate the full potential of the newly developed components at the transceiver subsystem level, SIPHO-G will also build a 1.6T hybrid module prototype, including both the advanced SiPho PIC and a carefully co-designed EIC chip containing high-speed driver and amplifier arrays implemented in advanced FDX22 technology, which is ideally suited for high-speed transceivers. This demonstrator module, fully manufactured in Europe, will showcase the capability of the newly developed technology at a higher abstraction level and fast-track the industrial uptake.
The Sipho-G project developments are progressing, collaborations among partners are ongoing, and the goals set in the description of action should be achieved.
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