Advanced GeSi components for next-generation silicon photonics applications

Informacje na temat projektu

SIPHO-G

Identyfikator umowy o grant: 101017194

DOI

10.3030/101017194

Projekt został zamknięty

Data podpisania przez KE 15 Grudnia 2020

Data rozpoczęcia 1 Stycznia 2021

Data zakończenia 30 Czerwca 2025

Finansowanie w ramach

• INDUSTRIAL LEADERSHIP - Leadership in enabling and industrial technologies - Information and Communication Technologies (ICT)

Koszt całkowity

€ 5 004 207,50

Wkład UE

€ 4 996 207,50

Koordynowany przez

INTERUNIVERSITAIR MICRO-ELECTRONICA CENTRUM
Belgium

Periodic Reporting for period 3 - SIPHO-G (Advanced GeSi components for next-generation silicon photonics applications)

Okres sprawozdawczy: 2024-04-01 do 2025-06-30

Podsumowanie kontekstu i ogólnych celów projektu

The SIPHO-G project advanced the performance and integration of Ge-based optical modulators and photodetectors within Silicon Photonics, and in particular the bandwidth density, power efficiency, sensitivity, and complexity of silicon photonic integrated circuits. Key applications are in next-generation optical communication and computing systems.
These developments are significant for society, as the demand for faster, more efficient, and scalable data transmission continues to grow with the expansion of cloud computing, artificial intelligence, and high-speed networks. Hence, the SIPHO-G project contributed to enabling future technologies that support digital transformation, economic growth, and societal connectivity.
The overall objectives of SIPHO-G were to develop and monolithically integrate 100Gbaud Germanium-Silicon (GeSi) Quantum-Confined Stark-Effect (QCSE)electro-absorption modulators and highly sensitive >100Gbaud avalanche photodetectors (APD) into a state-of-the-art 300mm Silicon Photonics platform. The project aimed to deliver compact, waveguide-coupled modulator and detector building blocks, supported by advanced simulation and design frameworks. By unifying the entire Silicon Photonics value chain, SIPHO-G successfully accelerated the development of co-packaged optics, long-haul optical communications, and emerging photonic integrated circuit applications—such as optical neuromorphic computing—achieving performance levels 4x–20x beyond the previous state-of-the-art.

Prace wykonane od początku projektu do końca okresu sprawozdawczego oraz najważniejsze dotychczasowe rezultaty

The SIPHO-G project has developed silicon photonics technology, integrating ultra-fast >100 Gbaud Germanium-Silicon (GeSi) electro-absorption modulators and avalanche photodetectors (APDs) on a 300 mm platform to achieve 4×–20× improvements in bandwidth density, energy efficiency, and sensitivity. These advances in optical modulation and photodetection enable next-generation photonic integrated circuits and were demonstrated in application-driven prototypes across the O-band and C-band – including a 1.6 Tb/s co-packaged optics module – showcasing the technology’s potential for future data center interconnects, long-haul networks, and neuromorphic optical computing.
Exploitation of Results: SIPHO-G’s outcomes are exploited in industry and research. Imec is integrating the new GeSi modulators and APDs into its silicon photonics platform. Industrial and academic organizations will be able to adopt these components through standard foundry services. Industrial partners are evaluating the technology for their next-generation products. This includes the 1.6 Tb/s transceiver and >100 Gbaud devices for high-performance computing and AI interconnects, as well as the high-speed modulators and receivers in 5G networks. The advanced epitaxial processes (for Ge/Si multi-quantum-well growth) developed in the project are being leveraged to enhance semiconductor manufacturing equipment. The know-how gained in photonic–CMOS co-integration from SIPHO-G’s hybrid PIC developments will be exploited for foundry and further development. The work on the design and modeling of the new photonic components is commercialized by SIPHO-G partners targeting photonics R&D – both industrial and academic. These are advanced quantum-well optical models for QCSE modulators, enhancing predictive accuracy for device performance and a PDK extended with compact models and automated design flows, linking device-level simulations to circuit-level design. Academic partners are using SIPHO-G innovations in education and further research.
Dissemination Activities: The consortium has shared results through scientific and public channels. Partners published 50 papers in leading journals and presented at major international conferences (OFC, ECOC, CLEO, Photonics West). A website (www.sipho-g.eu) and LinkedIn page provided regular updates and public deliverables. These platforms, along with press releases and media coverage, attracted broad interest. Tutorials and a hands-on workshop trained engineers and researchers in using the new photonics circuit design kits and simulation tools.

Innowacyjność oraz oczekiwany potencjalny wpływ (w tym dotychczasowe znaczenie społeczno-gospodarcze i szersze implikacje społeczne projektu)

SIPHO-G brought together a comprehensive consortium that complements the Silicon Photonics toolbox with advanced modulator and photodetector building blocks, in the form of the waveguide-integrated Quantum-Confined Stark Effect (QCSE) modulator, Franz-Keldysh electro-absorption modulator (FK-EAM) with >100GHz bandwidth, and Avalanche Photo-Detectors (APD) that achieve over 70GHz 3-dB bandwidth. These devices were implemented using wafer-scale monolithic epitaxial growth of highly crafted Ge/Si layer stacks, utilizing chemical-vapor deposition (CVD) epitaxial reactors already available in mainstream CMOS foundries, guaranteeing straightforward introduction into future products by leveraging existing supply chains.
The project developed an elaborate simulation and design framework. Advanced quantum-well optical models for modulators and a TCAD model for APDs were developed and implemented, enabling accurate performance prediction and further device optimization. A schematic capture tool was further developed to enable for advanced functionality that allows designers to run time domain simulations on photonic integrated circuits containing active devices such as modulators and photodetectors. Furthermore, a new software interface connecting design and modeling tools from two partners was developed and integrated: the circuit simulation software is connected with the device simulation software for designing active photonic integrated circuits.
In order to demonstrate the full potential of the newly developed components and building blocks several application-specific prototypes were designed, implemented and characterised. A Time-Space-Wavelength Multiplexed Photonic cross-bar for Ultra-High-Speed Optical Computing was implemented enabling the execution of higher-dimensional neural networks on chip achieving record compute rates of 60 Gbaud. SIPHO-G built a multi-channel co-packaged optics transceiver that delivered 1.6 Tb/s, including both the advanced Photonic Integrated Circuit (PIC) and a co-designed Electronic Integrated Circuit (EIC) chip containing high-speed driver and amplifier arrays implemented in advanced FDX22 technology. This demonstrator module, fully manufactured in Europe, showcased the capability of the newly developed technology at a higher abstraction level and fast-track the industrial uptake.
The main socio-economic impact of SIPHO-G’s outcomes is to enable transmitting data at high bandwidth with minimal power which means that data centres and supercomputers can scale up bandwidth while using less energy per bit, helping to make digital infrastructure greener. In telecommunications, the new GeSi components are supporting Europe’s goals for gigabit connectivity and future 6G services. Developed and demonstrated within Europe’s semiconductor industry, this technology strengthens European leadership in photonic chips and has a clear path to market through industry partners. In the longer term, SIPHO-G enables new applications – for example, photonic neural networks for AI hardware.

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