The work carried during this period has addressed mostly tasks included WP1 and some pertaining to WP2 and WP3. WP1: Principles and Fundamentals of Analog Photonic Computation: In the beginning of the project, we worked in task WP1.1 to extend our initial (unpublished) study on basic anbit properties. This in-depth study addressed the definition of the unit of information as a 2D vector and the techniques for its generation, detection/measurement. The study was completed with the definition of operations (cartesian and tensorial) that will allow us to work with multiple anbits in a complete computational system. A central part of the new computing paradigm are the elementary operations carried by single anbit processing units or gates. We have worked on this aspect in task WP1.2 where we have analysed the specific properties and the underlying algebra of three potential implementations including the development of a generalized Bloch sphere formalism to account for the transformations implemented by them. We have developed, as well, the basic theoretical basis for multiple gate combinational and sequential systems in tasks WP1.3 and WP1.4 respectively.
WP2: Analog Photonic Computation Architectures: Our work has focused mainly on Task W2.1 where we have studied the circuit design to implement and detect a single unit of information. In particular, we have focused our attention on the design of the receiver hardware and proposed a novel architecture, for which a national patent P202430891 has been applied and granted. An international PCT extension has been presented in 2025. To expand the applicability of this architecture into a transceiver configuration we have applied and obtained an ERC Proof of concept grant (ERC-POC-2025-101241773 TRANSBIT).
WP3: Fabrication, testing and validation: our initial work carried in task W3.1 has focused on designing and fabricating a low-complexity design for a system composed of a u-gate and a receiving unit based on differential detection. The chip layout was produced in Q4-Q1 of 2024/2025 and sent for fabrication in Q1 of 2025. The chip was fabricated in Silicon on Insulator (SOI) technology incorporating thermo-optic phase-shifters, received, packaged and measured in Q2 of 2025. The chip layout and micrograph is shown in Fig. 1(b). Measurements have provided very promising results in terms of robustness against noise and tolerance against fabrication errors, demonstrating the possibility of encoding in the three degrees of freedom of the generalized Bloch sphere (Figure 1(c)) and over 1024 states (a remarkable capacity of 10 bits per anbit) (Figure 1(d)).
Knowledge and technology transfer: We proposed a novel architecture, for which a national patent P202430891[5] has been applied and granted. The invention relates to integrated opto-electrical converters that transform an analog bit (or anbit) physically implemented with optical signals into an anbit implemented with electrical currents. It encompasses two different hardware schemes based on beam splitters, beam combiners, PIN photodiodes, and a signal processing routine. These schemes are respectively based on direct detection and interferometry, see Figures 2 and 3.
The main novelty of the present invention relies on the fact that the opto-electrical converters depicted in Figures 2 and 3 are conceived to transform optical anbits into electrical anbits making use of direct detection and interferometric strategies. In September 2025 we have applied for an international PCT extension of this patent.
However, a major challenge remains: the efficient combined generation and detection of anbits. Existing solutions rely on fixed optical components, making them susceptible to fabrication errors and operational drifts, limiting scalability and precision. To expand the applicability of the former architectures in combination with transmitter schemes into a transceiver configuration we have applied and obtained an ERC Proof of concept grant (ERC-POC-2025-101241773 TRANSBIT). TRANSBIT addresses this challenge by introducing reconfigurable photonic transceivers for anbit encoding and detection. By replacing static beam combiners with tuneable basic units of PIP, TRANSBIT will enable real-time adaptive error correction, ensuring stable and high-fidelity operation. This approach not only enhances analog photonic computational capabilities, but also facilitates its scalability and practical deployment.
The main achievement list is
1. The development of the full theory for analog photonic computation principles (unit of information, transformations, gate structure and implementation) based on linear optics and integrated photonic components (linked to [1])
2. Conceiving novel architectures for the detection of optical analog bits based differential and interferometric integrated configurations and getting a patent application filed (linked to [1] and [5]).
3. Fabricating and demonstrating the successful production and detection of anbits using the former detecting schemes including the demonstration of high tolerance to noise and extremely high capacity per anbit (10 bits/anbit) (linked to [4],[5])
4. Developing the full theory of information linked to analog photonic computation (linked to [4]).
5. Applying and getting an ERC Proof of concept linked to the development of transceivers for analog photonic computing using programmable photonics.
