Periodic Reporting for period 1 - UPLIFT (Ultralow-power logic-in-memory devices based on ferroelectric two-dimensional electron gases)
Okres sprawozdawczy: 2023-09-01 do 2025-02-28
The UPLIFT project was launched in response to the pressing need for disruptive microelectronics technologies that reduce the power consumption of information and communication technology (ICT) systems. Conventional CMOS-based approaches are facing both physical limitations and environmental concerns, with rising energy demands projected to represent more than 20% of global electricity consumption by 2030. UPLIFT proposed an innovative alternative—the FESO (Ferroelectric Spin-Orbit) architecture—leveraging ferroelectric two-dimensional electron gases (2DEGs) to enable ultra-low-power logic-in-memory devices. This novel design circumvents the need for magnetoelectric switching, achieving energy-efficient spin-charge conversion via ferroelectric control of Rashba spin-orbit coupling. The project’s ambition was to demonstrate a room-temperature proof-of-concept (PoC) of this architecture using industrially relevant ferroelectric oxides like BaTiO₃, thereby bridging fundamental research with commercial potential.
UPLIFT successfully grew high-quality BaTiO₃ thin films exhibiting ferroelectricity at room temperature and achieved low switching voltages below 0.2 V. Functional 2DEGs were created in these films, and prototype spin-charge conversion was demonstrated at room temperature using spin pumping techniques. Several generations of FESO devices were fabricated, incorporating nanostructuring approaches to reach lateral sizes below 200 nm. While full ferroelectric control of spin conversion at 300 K is still under validation, significant progress was made in both material integration and device design. Additionally, FESO-based logic circuits were modeled, confirming competitive energy-delay performance compared to CMOS.
UPLIFT advanced the state of the art by enabling spin-charge conversion in room-temperature ferroelectric 2DEGs and designing logic architectures that integrate memory and computing in a single device. These outcomes pave the way for a new class of spintronic logic-in-memory hardware with applications in data centers and edge computing. Several key milestones were reached: (i) fabrication of sub-200 nm FESO nanodevices; (ii) demonstration of robust ferroelectric switching; (iii) establishment of spin-pumping protocols for rapid evaluation; and (iv) exploration of device endurance and scaling behavior. During the project, the spin-off company NELLOW was created (October 2024) to support further industrialization, and secured EIC Transition funding. NELLOW is currently conducting a fundraising campaign targeting €10M within 12 months to pursue scale-up, IP development, and entry into pilot lines.