Final Report Summary - MIANT (Monolithic Integrated Antennas)
The Monolithic Integrated Antenna (MIANT) project investigates the embedding of monolithic antennas within silicon-based digital integrated circuits. This problem is interesting because it can provide efficient technology for wireless communication between chips within a system. This can be useful for speeding up communications in digital systems while at the same time significantly simplifying the design process. The technology can also find place in sensor systems, for efficient data harvesting, and many others.
The state of the art allows for integration of millimetre wave transceivers using CMOS technology. The efficient integration of the antenna remains as a task. There are three major problems to be solved. First, the antenna should occupy minimum chip area. This problem has been solved in previous works of the principle investigator. The solution is based on building the antenna using available metallisation structures like the CMOS digital ground supply plane. The second problem is that the silicon substrate, used in the standard CMOS process is of very low resistivity, therefore it has very high dielectric losses in the microwave range. This problem has been addressed in the first half of the MIANT project. And finally, sharing metallisation between the digital and the analog part of the integrated circuit results in interference between them, which has been studied during the second half of the project.
The scientific objectives of the project are the investigation of possible techniques for reducing the dielectric losses in the silicon substrate of the embedded antennas and study of the interference between the digital and the analog part of the integrated circuit. The first period of the MIANT project has been dedicated to studying techniques for minimising the dielectric losses in the substrate. Two approaches have been compared both numerically and experimentally: using high-resistivity substrate for reducing the losses in the material; and using very thin substrates, for minimising the volume where losses occur. The second period of the MIANT project has been dedicated to interference investigation. An experimental set-up has been developed an manufactured for the purpose. It contains an on-chip slot antenna built in the CMOS ground supply plane and digital circuitry under the antenna. When the digital circuit is operational the transistor switching currents manifest as noise at the antenna port.
The results of the work performed in the first reporting period provide a comparison of the studied techniques for antenna integration both in terms of obtainable antenna efficiency and in terms of technological complexity. The high resistivity substrate solution shows an advantage in both aspects, requiring less deviations from the standard CMOS technology and providing higher antenna efficiency. The results also show that monolithic antenna integration is feasible on very thin substrates as well, with chip-to-chip data rates in the 10s Gbps range obtainable.
The results of the work performed in the second reporting period provide experimental results for the induced noise on the antenna port due to the transistor switching currents. It has been shown that this noise is lower than the thermal noise when the antenna operational frequency is 24 GHz and the digital signal switching the MOS transistors has a frequency of 25 MHz. An extrapolation formula has been proposed in order to estimate the frequency at which the switching noise becomes lower than the thermal noise.
The MIANT project has provided the researcher excellent integration opportunities. He has been employed as a part time lecturer since 2012, and since 2014 he has been given a full time “Assistant Professor” position at the Faculty of Telecommunications. According to his career development plan he will be offered a permanent position as an Associate Professor in 2016.
The researcher has participated in several research groups aiming the exploitation of the project results so far, including the investigation of the communication aspects of wireless chip to chip links and study of wireless sensor integrated circuits with monolithic antennas. The research groups have had participants both from international institutions like German and Danish universities, as well as from the host institution and from local industry partners. The researcher has presented his work at top level international conferences. He has lead an international group for submitting a research proposal to the Horizon 2020 FET-OPEN call. He has also established many contacts with local and international research groups in pursuit of scientific collaboration.
The researcher is also participating in the teaching activities of the host institution. He is lecturing courses in Circuit design and in Communications. He has also supervised the bachelor's thesis of five students.
The state of the art allows for integration of millimetre wave transceivers using CMOS technology. The efficient integration of the antenna remains as a task. There are three major problems to be solved. First, the antenna should occupy minimum chip area. This problem has been solved in previous works of the principle investigator. The solution is based on building the antenna using available metallisation structures like the CMOS digital ground supply plane. The second problem is that the silicon substrate, used in the standard CMOS process is of very low resistivity, therefore it has very high dielectric losses in the microwave range. This problem has been addressed in the first half of the MIANT project. And finally, sharing metallisation between the digital and the analog part of the integrated circuit results in interference between them, which has been studied during the second half of the project.
The scientific objectives of the project are the investigation of possible techniques for reducing the dielectric losses in the silicon substrate of the embedded antennas and study of the interference between the digital and the analog part of the integrated circuit. The first period of the MIANT project has been dedicated to studying techniques for minimising the dielectric losses in the substrate. Two approaches have been compared both numerically and experimentally: using high-resistivity substrate for reducing the losses in the material; and using very thin substrates, for minimising the volume where losses occur. The second period of the MIANT project has been dedicated to interference investigation. An experimental set-up has been developed an manufactured for the purpose. It contains an on-chip slot antenna built in the CMOS ground supply plane and digital circuitry under the antenna. When the digital circuit is operational the transistor switching currents manifest as noise at the antenna port.
The results of the work performed in the first reporting period provide a comparison of the studied techniques for antenna integration both in terms of obtainable antenna efficiency and in terms of technological complexity. The high resistivity substrate solution shows an advantage in both aspects, requiring less deviations from the standard CMOS technology and providing higher antenna efficiency. The results also show that monolithic antenna integration is feasible on very thin substrates as well, with chip-to-chip data rates in the 10s Gbps range obtainable.
The results of the work performed in the second reporting period provide experimental results for the induced noise on the antenna port due to the transistor switching currents. It has been shown that this noise is lower than the thermal noise when the antenna operational frequency is 24 GHz and the digital signal switching the MOS transistors has a frequency of 25 MHz. An extrapolation formula has been proposed in order to estimate the frequency at which the switching noise becomes lower than the thermal noise.
The MIANT project has provided the researcher excellent integration opportunities. He has been employed as a part time lecturer since 2012, and since 2014 he has been given a full time “Assistant Professor” position at the Faculty of Telecommunications. According to his career development plan he will be offered a permanent position as an Associate Professor in 2016.
The researcher has participated in several research groups aiming the exploitation of the project results so far, including the investigation of the communication aspects of wireless chip to chip links and study of wireless sensor integrated circuits with monolithic antennas. The research groups have had participants both from international institutions like German and Danish universities, as well as from the host institution and from local industry partners. The researcher has presented his work at top level international conferences. He has lead an international group for submitting a research proposal to the Horizon 2020 FET-OPEN call. He has also established many contacts with local and international research groups in pursuit of scientific collaboration.
The researcher is also participating in the teaching activities of the host institution. He is lecturing courses in Circuit design and in Communications. He has also supervised the bachelor's thesis of five students.