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Zawartość zarchiwizowana w dniu 2024-05-29

Symbolic techniques for circuit optimisation

Cel

During the last decade, advances made in fabrication technology and photolithography have fostered the step from micro- to nano-electronics allowing integrated circuits to be produced on an ULSI basis. This has greatly increased the complexity of state-of-the-art integrated circuits whose design is even more targeted towards system-on-chip solutions. In this context, the role of CAD techniques for circuit analysis and optimization became essential to obtain solutions that satisfy the requested performance with the minimum time effort (i.e. minimizing the time-to-market).

The research topic of this project concerns the development of an integrated symbolic optimization environment that merges the capabilities of state-of-the-art symbolic analysis techniques and optimization algorithms. The motivation for applying symbolic techniques, instead of traditional numerical analysis, to the field of circuit design is twofold: on one hand, to allow for faster performance evaluation of even complex circuits; on the other hand, to gain insight into circuit behaviour through inspection of simple analytical expressions.

Special regard will be given to the investigation of nonlinear symbolic techniques for single- and multi-objective optimization of real-life circuits of industrial complexity. The inter-sectorial character of the project is guaranteed by the fact that involved partners operate in two distinct fields, i.e. microelectronics and applied mathematics, whose mixture will generate knowledge, innovation, and added-value for both of them.

Zaproszenie do składania wniosków

FP6-2004-MOBILITY-3
Zobacz inne projekty w ramach tego zaproszenia

Koordynator

STMICROELECTRONICS S.R.L.
Wkład UE
Brak danych
Koszt całkowity
Brak danych

Uczestnicy (1)