Integration of III-V Nanowire Semiconductors for next Generation High Performance CMOS SOC Technologies

Risultati finali

Improved noise measurements and RF noise model. p-type noise
PA and LNA data sheet
Web site launch and Press Release for the INSIGHT project

Web site launch and Press Release for the INSIGHT project

Correlation between CV, 1/f, Hysteresis gm(w) on the border trap density

Correlation between CV, 1/f, Hysteresis gm(w) on the border trap density.

Final report on RF-transistors
Data from first small signal model obtained from existing nanowire technology
First noise measurements and RF noise model
Second update on Dissemination Plan

Second update on dissemination plan. It will be included in the “plan for Dissemination and Exploitation”.

Circuit-level Benchmarking Report
Final Dissemination Plan

Final Dissemination Plan. It will be included in “Plan for Dissemination and Exploitation”.

External Communication Plan
Report on high voltage (3-6V) gate stack development

Pubblicazioni

First RF characterization of InGaAs replacement metal gate (RMG) nFETs on SiGe-OI FinFETs fabricated by 3D monolithic integration

Autori: V. Deshpande, V. Djara, E. O'Connor, D. Caimi, M. Sousa, L. Czornomaz, J. Fompeyrine, P. Hashemi, K. Balakrishnan
Pubblicato in: 2016 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS), Numero Yearly, 2016, Pagina/e 127-130, ISBN 978-1-4673-8609-8
Editore: IEEE
DOI: 10.1109/ULIS.2016.7440069

Self-aligned, gate-last process for vertical InAs nanowire MOSFETs on Si

Autori: Martin Berg, Karl-Magnus Persson, Olli-Pekka Kilpi, Johannes Svensson, Erik Lind, Lars-Erik Wernersson
Pubblicato in: 2015 IEEE International Electron Devices Meeting (IEDM), 2015, Pagina/e 31.2.1-31.2.4, ISBN 978-1-4673-9894-7
Editore: IEEE
DOI: 10.1109/IEDM.2015.7409806

Single suspended InGaAs nanowire MOSFETs

Autori: Cezar B. Zota, Lars-Erik Wernersson, Erik Lind
Pubblicato in: 2015 IEEE International Electron Devices Meeting (IEDM), 2015, Pagina/e 31.4.1-31.4.4, ISBN 978-1-4673-9894-7
Editore: IEEE
DOI: 10.1109/IEDM.2015.7409808

Initial investigation on the impact of in situ hydrogen plasma exposure to the interface between molecular beam epitaxially grown p-Ga0.7In0.3Sb (100) and thermal atomic layer deposited (ALD) Al2O3

Autori: Millar, D., Peralagu, U., Fu, Y.-C., Li, X., Steer, M., and Thayne, I.
Pubblicato in: WoDIM, Numero Yearly; Session 4: III-V FETs, 2016, Pagina/e N/A
Editore: http://wodim2016.imm.cnr.it/index.asp?cont=program

Balanced Drive Currents in 10–20 nm Diameter Nanowire All-III-V CMOS on Si

Autori: Adam Jonsson, Johannes Svensson, Lars-Erik Wemersson
Pubblicato in: 2018 IEEE International Electron Devices Meeting (IEDM), 2018, Pagina/e 39.3.1-39.3.4, ISBN 978-1-7281-1987-8
Editore: IEEE
DOI: 10.1109/iedm.2018.8614685

Sub-100-nm gate-length scaling of vertical InAs/InGaAs nanowire MOSFETs on Si

Autori: Olli-Pekka Kilpi, Johannes Svensson, Lars-Erik Wernersson
Pubblicato in: 2017 IEEE International Electron Devices Meeting (IEDM), 2017, Pagina/e 17.3.1-17.3.4, ISBN 978-1-5386-3559-9
Editore: IEEE
DOI: 10.1109/iedm.2017.8268408

Profiling border-traps by TCAD analysis of multifrequency CV-curves in Al<inf>2</inf>O<inf>3</inf>/InGaAs stacks

Autori: E. Caruso, J. Lin, K. F. Burke, K. Cherkaoui, D. Esseni, F. Gity, S. Monaghan, P. Palestri, P. Hurley, L. Selmi
Pubblicato in: 2018 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS), 2018, Pagina/e 1-4, ISBN 978-1-5386-4811-7
Editore: IEEE
DOI: 10.1109/ulis.2018.8354757

Low-Temperature Front-Side BEOL Technology with Circuit Level Multiline Thru-Reflect-Line Kit for III-V MOSFETs on Silicon

Autori: Stefan Andric, Lars Ohlsson, Lars-Erik Wenrersson
Pubblicato in: 2019 92nd ARFTG Microwave Measurement Conference (ARFTG), 2019, Pagina/e 1-4, ISBN 978-1-5386-6599-2
Editore: IEEE
DOI: 10.1109/arftg.2019.8637222

First demonstration of 3D SRAM through 3D monolithic integration of InGaAs n-FinFETs on FDSOI Si CMOS with inter-layer contacts

Autori: V. Deshpande, H. Hahn, E. O'Connor, Y. Baumgartner, M. Sousa, D. Caimi, H. Boutry, J. Widiez, L. Brevard, C. Le Royer, M. Vinet, J. Fompeyrine, L. Czornomaz
Pubblicato in: 2017 Symposium on VLSI Technology, 2017, Pagina/e T74-T75, ISBN 978-4-86348-605-8
Editore: IEEE
DOI: 10.23919/vlsit.2017.7998205

Integration of III–V nanowires for the next RF- and logic technology generation

Autori: Lars-Erik Wernersson
Pubblicato in: 2017 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA), 2017, Pagina/e 1-2, ISBN 978-1-5090-5805-1
Editore: IEEE
DOI: 10.1109/vlsi-tsa.2017.7942489

A scaled replacement metal gate InGaAs-on-Insulator n-FinFET on Si with record performance

Autori: H. Hahn, V. Deshpande, E. Caruso, S. Sant, E. O'Connor, Y. Baumgartner, M. Sousa, D. Caimi, A. Olziersky, P. Palestri, L. Selmi, A. Schenk, L. Czornomaz
Pubblicato in: 2017 IEEE International Electron Devices Meeting (IEDM), 2017, Pagina/e 17.5.1-17.5.4, ISBN 978-1-5386-3559-9
Editore: IEEE
DOI: 10.1109/iedm.2017.8268410

Hybrid InGaAs/SiGe CMOS circuits with 2D and 3D monolithic integration

Autori: V. Deshpande, H. Hahn, V. Djara, E. O'Connor, D. Caimi, M. Sousa, J. Fompeyrine, L. Czornomaz
Pubblicato in: 2017 47th European Solid-State Device Research Conference (ESSDERC), 2017, Pagina/e 244-247, ISBN 978-1-5090-5978-2
Editore: IEEE
DOI: 10.1109/essderc.2017.8066637

InGaAs FinFETs 3D Sequentially Integrated on FDSOI Si CMOS with Record Perfomance

Autori: C. Convertino, C. B. Zota, D. Caimi, M. Sousa, L. Czornomaz
Pubblicato in: 2018 48th European Solid-State Device Research Conference (ESSDERC), 2018, Pagina/e 162-165, ISBN 978-1-5386-5401-9
Editore: IEEE
DOI: 10.1109/essderc.2018.8486862

First InGaAs lateral nanowire MOSFET RF noise measurements and model

Autori: Lars Ohlsson, Fredrik Lindelow, Cezar B. Zota, Matthias Ohlrogge, Thomas Merkle, Lars-Erik Wernersson, Erik Lind
Pubblicato in: 2017 75th Annual Device Research Conference (DRC), 2017, Pagina/e 1-2, ISBN 978-1-5090-6328-4
Editore: IEEE
DOI: 10.1109/drc.2017.7999451

High Performance Quantum Well InGaAs-On-Si MOSFETs With sub-20 nm Gate Length For RF Applications

Autori: C. B. Zota, C. Convertino, Y. Baumgartner, M. Sousa, D. Caimi, L. Czornomaz
Pubblicato in: 2018 IEEE International Electron Devices Meeting (IEDM), 2018, Pagina/e 39.4.1-39.4.4, ISBN 978-1-7281-1987-8
Editore: IEEE
DOI: 10.1109/iedm.2018.8614530

InGaAs-on-Insulator FinFETs with Reduced Off-Current and Record Performance

Autori: C. Convertino, C. Zota, S. Sant, F. Eltes, M. Sousa, D. Caimi, A. Schenk, L. Czornomaz
Pubblicato in: 2018 IEEE International Electron Devices Meeting (IEDM), 2018, Pagina/e 39.2.1-39.2.4, ISBN 978-1-7281-1987-8
Editore: IEEE
DOI: 10.1109/iedm.2018.8614640

Investigation of InAs/GaSb tunnel diodes on SOI

Autori: C. Convertino, D. Cutaia, H. Schmid, N. Bologna, P. Paletti, A.M. Ionescu, H. Riel, K. E. Moselund
Pubblicato in: 2017 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS), 2017, Pagina/e 148-151, ISBN 978-1-5090-5313-1
Editore: IEEE
DOI: 10.1109/ulis.2017.7962586

Properties of III–V nanowires: MOSFETs and TunnelFETs

Autori: Lars-Erik Wernersson
Pubblicato in: 2017 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS), 2017, Pagina/e 99-100, ISBN 978-1-5090-5313-1
Editore: IEEE
DOI: 10.1109/ulis.2017.7962611

A 250 GHz millimeter wave amplifier MMIC based on 30 nm metamorphic InGaAs MOSFET technology

Autori: Arnulf Leuther, Matthias Ohlrogge, Lukas Czornomaz, Thomas Merkle, Frank Bernhardt, Axel Tessmann
Pubblicato in: 2017 12th European Microwave Integrated Circuits Conference (EuMIC), 2017, Pagina/e 130-133, ISBN 978-2-87487-048-4
Editore: IEEE
DOI: 10.23919/eumic.2017.8230677

Monolithic integration of multiple III-V semiconductors on Si

Autori: H. Schmid, B. Mayer, J. Gooth, S. Wirths, L. Czornomaz, H. Riel, S. Mauthe, C. Convertino, K. E. Moselund
Pubblicato in: 2017 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S), 2017, Pagina/e 1-3, ISBN 978-1-5386-3766-1
Editore: IEEE
DOI: 10.1109/s3s.2017.8309200

InGaAs-on-Si (Ge) 3D Monolithic Technology for CMOS and More-than-Moore

Autori: V. Deshpande, V. Djara, T. Morf, P. Hashemi, E. O’Connor, K. Balakrishnan, D. Caimi, M. Sousa, L. Czornomaz and J. Fompeyrine
Pubblicato in: Int'l Conf. on Solid State Devices and Materials (SSDM),, Numero Book of Extended Abstracts in 2016, 2016
Editore: SSDM

80 nm InGaAs MOSFET W-band low noise amplifier

Autori: Amulf Leuther, Matthias Ohlrogge, Lukas Czornomaz, Thomas Merkle, Frank Bernhardt, Axel Tessmann
Pubblicato in: 2017 IEEE MTT-S International Microwave Symposium (IMS), 2017, Pagina/e 1133-1136, ISBN 978-1-5090-6360-4
Editore: IEEE
DOI: 10.1109/mwsym.2017.8058798

Vertical heterojunction InAs/InGaAs nanowire MOSFETs on Si with I<inf>on</inf> = 330 μA/μm at I<inf>off</inf> = 100 nA/μm and V<inf>D</inf> = 0.5 V

Autori: Olli-Pekka Kilpi, Jun Wu, Johannes Svensson, Erik Lind, Lars-Erik Wernersson
Pubblicato in: 2017 Symposium on VLSI Technology, 2017, Pagina/e T36-T37, ISBN 978-4-86348-605-8
Editore: IEEE
DOI: 10.23919/vlsit.2017.7998191

High Gain 220 - 275 GHz Amplifier MMICs Based on Metamorphic 20 nm InGaAs MOSFET Technology

Autori: A. Tessmann, A. Leuther, F. Heinz, F. Bernhardt, H. Massler
Pubblicato in: 2018 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS), 2018, Pagina/e 156-159, ISBN 978-1-5386-6502-2
Editore: IEEE
DOI: 10.1109/bcicts.2018.8550836

InGaAs-on-Insulator MOSFETs Featuring Scaled Logic Devices and Record RF Performance

Autori: C. B. Zota, C. Convertino, V. Deshpande, T. Merkle, M. Sousa, D. Caimi, L. Czomomaz
Pubblicato in: 2018 IEEE Symposium on VLSI Technology, 2018, Pagina/e 165-166, ISBN 978-1-5386-4218-4
Editore: IEEE
DOI: 10.1109/vlsit.2018.8510631

Monolithic integration of multiple III-V semiconductors on Si for MOSFETs and TFETs

Autori: H. Schmid, D. Cutaia, J. Gooth, S. Wirths, N. Bologna, K. E. Moselund, H. Riel
Pubblicato in: 2016 IEEE International Electron Devices Meeting (IEDM), Numero Yearly, 2016, Pagina/e 3.6.1-3.6.4, ISBN 978-1-5090-3902-9
Editore: IEEE
DOI: 10.1109/IEDM.2016.7838340

InGaAs tri-gate MOSFETs with record on-current

Autori: Cezar B. Zota, Fredrik Lindelow, Lars-Erik Wernersson, Erik Lind
Pubblicato in: 2016 IEEE International Electron Devices Meeting (IEDM), 2016, Pagina/e 3.2.1-3.2.4, ISBN 978-1-5090-3902-9
Editore: IEEE
DOI: 10.1109/IEDM.2016.7838336

InGaAs nanowire MOSFETs with I<inf>ON</inf> = 555 µA/µm at I<inf>OFF</inf> = 100 nA/µm and V<inf>DD</inf> = 0.5 V

Autori: Cezar B. Zota, Fredrik Lindelow, Lars-Erik Wernersson, Erik Lind
Pubblicato in: 2016 IEEE Symposium on VLSI Technology, Numero Yearly, 2016, Pagina/e 1-2, ISBN 978-1-5090-0638-0
Editore: IEEE
DOI: 10.1109/VLSIT.2016.7573418

Electrical Characterization and Modeling of Gate-Last Vertical InAs Nanowire MOSFETs on Si

Autori: Martin Berg, Olli-Pekka Kilpi, Karl-Magnus Persson, Johannes Svensson, Markus Hellenbrand, Erik Lind, Lars-Erik Wernersson
Pubblicato in: IEEE Electron Device Letters, Numero Volume:PP Numero: 99 , 2016, Pagina/e 1-1, ISSN 0741-3106
Editore: Institute of Electrical and Electronics Engineers
DOI: 10.1109/LED.2016.2581918

High-Performance Lateral Nanowire InGaAs MOSFETs with Improved On-Current

Autori: Cezar Zota, Lars-Erik Wernersson, Erik Lind
Pubblicato in: IEEE Electron Device Letters, 2016, Pagina/e 1-1, ISSN 0741-3106
Editore: Institute of Electrical and Electronics Engineers
DOI: 10.1109/LED.2016.2602841

High-Frequency InGaAs Tri-gate MOSFETs with fmax of 400 GHz

Autori: Cezar Zota, Fredrik Lindelöw, Lars-Erik Wernersson, Erik Lind
Pubblicato in: Electronics Letters, 2016, ISSN 0013-5194
Editore: Institute of Electrical Engineers
DOI: 10.1049/el.2016.3108

Electrical properties of metal/Al 2 O 3 /In 0.53 Ga 0.47 As capacitors grown on InP

Autori: Philippe Ferrandis, Mathilde Billaud, Julien Duvernay, Mickael Martin, Alexandre Arnoult, Helen Grampeix, Mikael Cassé, Hervé Boutry, Thierry Baron, Maud Vinet, Gilles Reimbold
Pubblicato in: Journal of Applied Physics, Numero 123/16, 2018, Pagina/e 161534, ISSN 0021-8979
Editore: American Institute of Physics
DOI: 10.1063/1.5007920

Low-Frequency Noise in III–V Nanowire TFETs and MOSFETs

Autori: Markus Hellenbrand, Elvedin Memisevic, Martin Berg, Olli-Pekka Kilpi, Johannes Svensson, Lars-Erik Wernersson
Pubblicato in: IEEE Electron Device Letters, Numero 38/11, 2017, Pagina/e 1520-1523, ISSN 0741-3106
Editore: Institute of Electrical and Electronics Engineers
DOI: 10.1109/led.2017.2757538

A Self-Aligned Gate-Last Process Applied to All-III–V CMOS on Si

Autori: Adam Jonsson, Johannes Svensson, Lars-Erik Wernersson
Pubblicato in: IEEE Electron Device Letters, Numero 39/7, 2018, Pagina/e 935-938, ISSN 0741-3106
Editore: Institute of Electrical and Electronics Engineers
DOI: 10.1109/led.2018.2837676

Low-frequency noise in nanowire and planar III-V MOSFETs

Autori: Markus Hellenbrand, Olli-Pekka Kilpi, Johannes Svensson, Erik Lind, Lars-Erik Wernersson
Pubblicato in: Microelectronic Engineering, 2019, Pagina/e 110986, ISSN 0167-9317
Editore: Elsevier BV
DOI: 10.1016/j.mee.2019.110986

Examining the relationship between capacitance-voltage hysteresis and accumulation frequency dispersion in InGaAs metal-oxide-semiconductor structures based on the response to post-metal annealing

Autori: Jun Lin, Scott Monaghan, Karim Cherkaoui, Ian M. Povey, Brendan Sheehan, Paul K. Hurley
Pubblicato in: Microelectronic Engineering, Numero 178, 2017, Pagina/e 204-208, ISSN 0167-9317
Editore: Elsevier BV
DOI: 10.1016/j.mee.2017.05.020

InGaAs FinFETs Directly Integrated on Silicon by Selective Growth in Oxide Cavities

Autori: Clarissa Convertino, Cezar Zota, Heinz Schmid, Daniele Caimi, Marilyne Sousa, Kirsten Moselund, Lukas Czornomaz
Pubblicato in: Materials, Numero 12/1, 2019, Pagina/e 87, ISSN 1996-1944
Editore: MDPI Open Access Publishing
DOI: 10.3390/ma12010087

Facet-selective group-III incorporation in InGaAs template assisted selective epitaxy

Autori: Mattias Borg, Lynne Gignac, John Bruley, Andreas Malmgren, Saurabh Sant, Clarissa Convertino, Marta D Rossell, Marilyne Sousa, Chris Breslin, Heike Riel, Kirsten E Moselund, Heinz Schmid
Pubblicato in: Nanotechnology, Numero 30/8, 2019, Pagina/e 084004, ISSN 0957-4484
Editore: Institute of Physics Publishing
DOI: 10.1088/1361-6528/aaf547

High frequency III–V nanowire MOSFETs

Autori: Erik Lind
Pubblicato in: Semiconductor Science and Technology, Numero 31/9, 2016, Pagina/e 093005, ISSN 0268-1242
Editore: Institute of Physics Publishing
DOI: 10.1088/0268-1242/31/9/093005

Electrical Properties of Vertical InAs/InGaAs Heterostructure MOSFETs

Autori: Olli-Pekka Kilpi, Johannes Svensson, Erik Lind, Lars-Erik Wernersson
Pubblicato in: IEEE Journal of the Electron Devices Society, Numero 7, 2019, Pagina/e 70-75, ISSN 2168-6734
Editore: Institute of Electrical and Electronics Engineers Inc.
DOI: 10.1109/jeds.2018.2878659

20-nm In0.8Ga0.2As MOSHEMT MMIC Technology on Silicon

Autori: Axel Tessmann, Arnulf Leuther, Felix Heinz, Frank Bernhardt, Laurenz John, Hermann Massler, Lukas Czornomaz, Thomas Merkle
Pubblicato in: IEEE Journal of Solid-State Circuits, 2019, Pagina/e 1-8, ISSN 0018-9200
Editore: Institute of Electrical and Electronics Engineers
DOI: 10.1109/jssc.2019.2915161

Vertical InAs/InGaAs Heterostructure Metal–Oxide–Semiconductor Field-Effect Transistors on Si

Autori: Olli-Pekka Kilpi, Johannes Svensson, Jun Wu, Axel R. Persson, Reine Wallenberg, Erik Lind, Lars-Erik Wernersson
Pubblicato in: Nano Letters, Numero 17/10, 2017, Pagina/e 6006-6010, ISSN 1530-6984
Editore: American Chemical Society
DOI: 10.1021/acs.nanolett.7b02251

High-Frequency Quantum Well InGaAs-on-Si MOSFETs With Scaled Gate Lengths

Autori: Cezar B. Zota, Clarissa Convertino, Marilyne Sousa, Daniele Caimi, Kirsten Moselund, Lukas Czornomaz
Pubblicato in: IEEE Electron Device Letters, Numero 40/4, 2019, Pagina/e 538-541, ISSN 0741-3106
Editore: Institute of Electrical and Electronics Engineers
DOI: 10.1109/led.2019.2902519

Demonstration of 3-D SRAM Cell by 3-D Monolithic Integration of InGaAs n-FinFETs on FDSOI CMOS With Interlayer Contacts

Autori: Veeresh Deshpande, H. Hahn, E. O'Connor, Y. Baumgartner, D. Caimi, M. Sousa, H. Boutry, J. Widiez, L. Brevard, C. Le Royer, M. Vinet, J. Fompeyrine, L. Czornomaz
Pubblicato in: IEEE Transactions on Electron Devices, Numero 64/11, 2017, Pagina/e 4503-4509, ISSN 0018-9383
Editore: Institute of Electrical and Electronics Engineers
DOI: 10.1109/ted.2017.2755662

DC and RF characterization of InGaAs replacement metal gate (RMG) nFETs on SiGe-OI FinFETs fabricated by 3D monolithic integration

Autori: V. Deshpande, V. Djara, E. O'Connor, P. Hashemi, K. Balakrishnan, D. Caimi, M. Sousa, L. Czornomaz, J. Fompeyrine
Pubblicato in: Solid-State Electronics, Numero 128, 2017, Pagina/e 87-91, ISSN 0038-1101
Editore: Pergamon Press Ltd.
DOI: 10.1016/j.sse.2016.10.034

High-performance InGaAs FinFETs with raised source/drain extensions

Autori: Clarissa Convertino, Cezar B. Zota, Daniele Caimi, Marilyne Sousa, Kirsten E. Moselund, Lukas Czornomaz
Pubblicato in: Japanese Journal of Applied Physics, Numero 58/8, 2019, Pagina/e 080901, ISSN 0021-4922
Editore: IOP Publishing

High-Mobility GaSb Nanostructures Cointegrated with InAs on Si

Autori: Mattias Borg, Heinz Schmid, Johannes Gooth, Marta D. Rossell, Davide Cutaia, Moritz Knoedler, Nicolas Bologna, Stephan Wirths, Kirsten E. Moselund, Heike Riel
Pubblicato in: ACS Nano, Numero 11/3, 2017, Pagina/e 2554-2560, ISSN 1936-0851
Editore: American Chemical Society
DOI: 10.1021/acsnano.6b04541

Inversion in the In 0.53 Ga 0.47 As metal-oxide-semiconductor system: Impact of the In 0.53 Ga 0.47 As doping concentration

Autori: É. O'Connor, K. Cherkaoui, S. Monaghan, B. Sheehan, I. M. Povey, P. K. Hurley
Pubblicato in: Applied Physics Letters, Numero 110/3, 2017, Pagina/e 032902, ISSN 0003-6951
Editore: American Institute of Physics
DOI: 10.1063/1.4973971

Impact of doping and diameter on the electrical properties of GaSb nanowires

Autori: Aein S. Babadi, Johannes Svensson, Erik Lind, Lars-Erik Wernersson
Pubblicato in: Applied Physics Letters, Numero 110/5, 2017, Pagina/e 053502, ISSN 0003-6951
Editore: American Institute of Physics
DOI: 10.1063/1.4975374

Uniting III-V Tunnel FETs with Silicon

Autori: Davide Cutaia, K. Moselund, H. Schmid, M. Borg, H. Riel
Pubblicato in: Compound Semiconductor, Numero 23 (1), 2017, Pagina/e 38-42, ISSN 2042-7328
Editore: Angel Business Communications

Three-dimensional monolithic integration of III-V and Si(Ge) FETs for hybrid CMOS and beyond

Autori: V. Deshpande, V. Djara, E. O'Connor, P. Hashemi, T. Morf, K. Balakrishnan, D. Caimi, M. Sousa, J. Fompeyrine, L. Czornomaz
Pubblicato in: Japanese Journal of Applied Physics, Numero vol 56, 2017, Pagina/e 04CA05, ISSN 1347-4065
Editore: Institute of Physics
DOI: 10.7567/JJAP.56.04CA05

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