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Zawartość zarchiwizowana w dniu 2024-04-19

Deeply Embedded ARM Applications

Cel

The objective of OMI/DE is to create and demonstrate a European capability in the design and manufacture of 32-bit RISC microprocessors for deeply embedded control, that is, systems where the processor is employed as a macrocell within a highly integrated chip that also contains significant application-specific components. The project further aims to create a European capability that will allow customers to develop their own deeply embedded systems, without reference to the technology suppliers, by providing a range of tools (from high-level simulation to VLSI macrocells for use with standard ASIC composition tools), and to provide the necessary support for system testing and debugging. The project takes as its baseline the ARM microprocessor architecture, designed in Europe, and a world-leader in low power RISC.

Detailed goals are to develop:

- macrocells for deeply embedded applications
- system simulation methodologies for deeply embedded systems
- testing and debugging methodologies
- new low-power technologies.

Existing and emerging standards (such as VHDL) will be employed, and existing silicon development tools used.

OMI/DE is organised around a number of applications feasibility studies which will assess the requirements for deeply embedded applications. The studies will feed into an investigation of the architectural extensions required to meet these applications and provide practical recommendations to the other OMI projects. The recommendations will guide implementations of both CPUs and application-specific macrocells within the framework of the other OMI Eurocell library and interface project, SMILE (6142). These macrocells will be used to construct applications demonstrators leading towards commercial exploitation. The applications have been chosen from the telecommunications and home entertainment industries: the final IRIS demonstrator will be a musical instrument based on a single silicon chip containing an embedded ARM microprocessor and a dedicated digital signal processor.

Temat(-y)

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System finansowania

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Koordynator

Advanced RISC Machines Ltd
Wkład UE
Brak danych
Adres
Swaffham Bulbeck
CB5 0NA Cambridge
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