Rezultaty
Second summer school organized.
Third summer schoolThird summer school organized.
First summer schoolFirst summer school organized.
Set up of intranet, data repository, and project management toolOPRECOMP will make use of a web-based professional project management tool in order to facilitate the better management of all administrative, technical, and financial activities of the project.
Web-site and project logoOPRECOMP public web-site and content, logo, presentation templates, and material for the identity of the project.
The data management plan initially released on month M06 will be updated and finalized.
Initial data management planA first version of the data management plan will be released.
Final report on the Big Data application in T8.3 using the kW platform.
ReRAM and heterogeneous 3D-memory architecture modelsThe outputs of this deliverable are ReRAM and heterogeneous 3D-Memory models, which allow on different abstraction levels (from circuit to system level) explorations of appropriate memory architectures.
Summer of code reportReport on the 2-year summer of code activity outcome.
Initial report of embedded deep learning using transprecision computingReport detailing the initial gains obtained by employing transprecision computing in deep learning applications
Evaluation results for heterogeneous memoriesReport on the energy efficiency of heterogeneous memory hierarchies based on emerging memory technologies.
Final communication activity and plan reportA report on planned/completed communication activities will be provided.
Final report on micro-benchmarksFinal report on the applications and micro-benchmarks selected for the project as well as the measured performance on state-of-the-art architectures.
Simulation results for NEMS memory devicesEvaluation results of non-conventional NEMS memory devices will be provided by UNIPG.
Stochastic logic gate modelingReport describing the functioning model of stochastic logic gates to be operated under large fluctuations.
Fundamental physics limitsReport that formalizes the fundamental physics limits of computation for logic gates and memory devices.
Final report of embedded deep learning using transprecision computingReport detailing all the gains obtained by employing transprecision computing in deep learning applications
Initial report of big data applications using transprecision computingInitial report on the Big Data application in T8.3 using the kW platform.
Evaluation of approximate computing techniquesThe output of this deliverable is a quantification of the benefits of memorization, task elimination, loop perforation, randomized sparsification and sketching, and skipping memory accesses.
Report on applications and micro-benchmarks performance demoReport on the achieved performance of the selected applications and micro-benchmarks by using the full transprecision framework developed during the project.
Final version of the algorithmsReport on the achieved gains attained with the new algorithms for data assimilation, linear algebra, graph analytics and the approximate computing.
Initial dissemination and exploitation plan reportInitial report on dissemination and exploitation. The report will include also a market analysis for the technology developed by OPRECOMP.
Processing unit for controllable precisionSpecification of the processing unit with precision control that will be used in mW and kW range systems.
Intermediate applications progress reportReport describing all the progress made on all micro-benchmarks.
Definition of the hardware abstraction layerDefinition of the hardware abstraction layer that controls various precision configuration options of architectures.
Final report on scientific computation using transprecision computingReport on scientific computation kernels running on the kW platform.
Error-energy relations: fundamental limitsReport containing the analysis of the relation between minimum energy required for logic operation that depends on fundamental physical constrains.
Initial communication activity and plan reportA report on planned/completed communication activities will be provided.
Transprecision software stack designAn initial characterization of relevant applications and/or proxy benchmarks for these applications. The deliverable will present the initial design and elaboration of functionality of the software stack.
Numerical analysis of algorithmsReport that assesses the effect of transprecision computing on the algorithms.
Initial report on scientific computation using transprecision computingInitial report on scientific computation kernels running on the kW platform.
Intermediate dissemination and exploitation plan reportIntermediate report on dissemination and exploitation. The report will include also a market analysis for the technology developed by OPRECOMP.
Prototype version of the algorithmsA report describing the advances attained with the algorithms during the initial refactoring phase.
Intermediate communication activity and plan reportA report on planned/completed communication activities will be provided.
Error-energy relations: technological limitsReport containing the analysis of the relation between minimum energy required for logic operation and result accuracy bounded by limits imposed by technology selected in WP4.
Numerical analysis of transprecisionReport that formalizes the extension of fundamental principles of numerical analysis to variable precision arithmetic.
Final dissemination and exploitation plan reportFinal report on dissemination and exploitation. The report will include also a market analysis for the technology developed by OPRECOMP.
NEMS/MEMS demo reportReport on the experimental verification of technology limits.
Final applications progress reportReport describing all the progress made on all micro-benchmarks.
Evaluation of transprecisionThe output of this deliverable is a quantification of the benefits of transprecision (e.g., low precision floating-point vs fixed-point representation) and stochastic estimators on the five problem domains.
Error resilienceReport with a precise characterization of the algorithmic kernels to be targeted by the approximate computing techniques on the five problem domains.
Quality metricsA concise definition of metrics to be used in the quality assessment of the solutions produced by the algorithms.
Initial report on micro-benchmarksInitial report on the applications and micro-benchmarks selected for the project as well as the measured performance on state-of-the-art architectures.
Initial applications progress reportReport describing all the progress made on all micro-benchmarks.
Initial working version of the HPC node. It will be used in WP8 to demonstrate the kW range apps.
Final version of the kW pilot-platformFinal working version of the HPC node. It will be used in WP8 to demonstrate the kW range apps.
Final version of the mW pilot-platformFinal working version of the mW platform. It will be used in WP8 to demonstrate the mW range apps.
Initial version of the mW pilot-platformInitial working version of the mW platform. It will be used in WP8 to demonstrate the mW range apps.
The initial version of the software stack will be early available for applications (WP7) and initial demonstrations (WP8). The final version will be used to make the final evaluations of the systems in the mW and kW range.
Initial version of transprecision software stackThe initial version of the software stack will be early available for applications (WP7) and initial demonstrations (WP8). The final version will be used to make the final evaluations of the systems in the mW and kW range.
Final version of transprecision software stackThe initial version of the software stack will be early available for applications (WP7) and initial demonstrations (WP8). The final version will be used to make the final evaluations of the systems in the mW and kW range.
Publikacje
Autorzy:
Gagandeep Singh, Dionysios Diamantopoulos, Christoph Hagleitner, Sander Stuijk, Henk Corporaal
Opublikowane w:
2019 29th International Conference on Field Programmable Logic and Applications (FPL), 2019, Strona(/y) 263-269, ISBN 978-1-7281-4884-7
Wydawca:
IEEE
DOI:
10.1109/fpl.2019.00050
Autorzy:
Dionysios Diamantopoulos, Florian Scheidegger, Stefan Mach, Fabian Schuiki, Germain Haugou, Michael Schaffner, Frank K. Gurkaynak, Christoph Hagleitner, A. Cristiano I. Malossi, Luca Benini
Opublikowane w:
2020 IEEE Symposium in Low-Power and High-Speed Chips (COOL CHIPS), 2020, Strona(/y) 1-3, ISBN 978-1-7281-6347-5
Wydawca:
IEEE
DOI:
10.1109/coolchips49199.2020.9097644
Autorzy:
Federico Pittino, Pietro Bonfà, Andrea Bartolini, Fabio Affinito, Luca Benini, Carlo Cavazzoni
Opublikowane w:
Proceedings of the Platform for Advanced Scientific Computing Conference, 2019, Strona(/y) 1-9, ISBN 9781450367707
Wydawca:
ACM
DOI:
10.1145/3324989.3325720
Autorzy:
Dionysios Diamantopoulos, Burkhard Ringlein, Mitra Purandare, Gagandeep Singh, Christoph Hagleitner
Opublikowane w:
International Conference on Field Programmable Logic and Applications, 2020, ISBN 978-1-7281-9902-3
Wydawca:
IEEE
DOI:
10.1109/fpl50879.2020.00058
Autorzy:
Konstantinos Tovletoglou, Lev Mukhanov, Dimitrios S. Nikolopoulos, Georgios Karakonstantis
Opublikowane w:
Proceedings of the Twenty-Fifth International Conference on Architectural Support for Programming Languages and Operating Systems, 2020, Strona(/y) 575-590, ISBN 9781450371025
Wydawca:
ACM
DOI:
10.1145/3373376.3378489
Autorzy:
Dionysios Diamantopoulos, Christoph Hagleitner
Opublikowane w:
2019 IEEE 30th International Conference on Application-specific Systems, Architectures and Processors (ASAP), 2019, Strona(/y) 71-74, ISBN 978-1-7281-1601-3
Wydawca:
IEEE
DOI:
10.1109/asap.2019.00-27
Autorzy:
Andrea Borghesi, Giuseppe Tagliavini, Michele Lombardi, Luca Benini, Michela Milano
Opublikowane w:
Proceedings of the 17th ACM International Conference on Computing Frontiers, 2020, Strona(/y) 10-18, ISBN 9781450379564
Wydawca:
ACM
DOI:
10.1145/3387902.3392615
Autorzy:
Gianmarco Ottavi; Angelo Garofalo; Giuseppe Tagliavini; Francesco Conti; Luca Benini; Davide Rossi
Opublikowane w:
IEEE Computer Society Annual Symposium on VLSI, 2020, ISBN 978-1-7281-5775-7
Wydawca:
IEEE
DOI:
10.1109/isvlsi49217.2020.000-5
Autorzy:
Gagandeep Singh, Dionysios Diamantopoulos, Christoph Hagleitner, Juan Gomez-Luna, Sander Stuijk, Onur Mutlu, Henk Corporaal
Opublikowane w:
2020 30th International Conference on Field-Programmable Logic and Applications (FPL), 2020, Strona(/y) 9-17, ISBN 978-1-7281-9902-3
Wydawca:
IEEE
DOI:
10.1109/fpl50879.2020.00014
Autorzy:
Eder F. Zulian, Christian Weis, Norbert Wehn
Opublikowane w:
2020 IEEE International Symposium on Circuits and Systems (ISCAS), 2020, Strona(/y) 1-5, ISBN 978-1-7281-3320-1
Wydawca:
IEEE
DOI:
10.1109/iscas45731.2020.9180873
Autorzy:
Alessio Burrello, Francesco Conti, Angelo Garofalo, Davide Rossi, Luca Benini
Opublikowane w:
Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis Companion, 2019, Strona(/y) 1-2, ISBN 9781450369237
Wydawca:
ACM
DOI:
10.1145/3349567.3351726
Autorzy:
Keiya Harada, Henri-Pierre Charles, Hiroaki Nishi
Opublikowane w:
2020 22nd International Conference on Advanced Communication Technology (ICACT), 2020, Strona(/y) 35-42, ISBN 979-11-88428-04-5
Wydawca:
IEEE
DOI:
10.23919/icact48636.2020.9061512
Autorzy:
Lukas Cavigelli, Philippe Degen, Luca Benini
Opublikowane w:
Proceedings of the 11th International Conference on Distributed Smart Cameras, 2017, Strona(/y) 1-8, ISBN 9781450354875
Wydawca:
ACM
DOI:
10.1145/3131885.3131906
Autorzy:
Andreas Kurth, Koen Wolters, Björn Forsberg, Alessandro Capotondi, Andrea Marongiu, Tobias Grosser, Luca Benini
Opublikowane w:
Proceedings of the 29th International Conference on Compiler Construction, 2020, Strona(/y) 119-131, ISBN 9781450371209
Wydawca:
ACM
DOI:
10.1145/3377555.3377891
Autorzy:
Matthias Jung, Kira Kraft, Taha Soliman, Chirag Sudarshan, Christian Weis, Norbert Wehn
Opublikowane w:
Proceedings of the International Symposium on Memory Systems, 2019, Strona(/y) 133-147, ISBN 9781450372060
Wydawca:
ACM
DOI:
10.1145/3357526.3357556
Autorzy:
Lukas Cavigelli, Luca Benini
Opublikowane w:
2019 IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS), 2019, Strona(/y) 279-283, ISBN 978-1-5386-7884-8
Wydawca:
IEEE
DOI:
10.1109/aicas.2019.8771562
Autorzy:
Salvatore Di Girolamo, Konstantin Taranov, Andreas Kurth, Michael Schaffner, Timo Schneider, Jakub Beránek, Maciej Besta, Luca Benini, Duncan Roweth, Torsten Hoefler
Opublikowane w:
Proceedings of the International Conference for High Performance Computing, Networking, Storage and Analysis, 2019, Strona(/y) 1-14, ISBN 9781450362290
Wydawca:
ACM
DOI:
10.1145/3295500.3356189
Autorzy:
Pasquale Davide Schiavone, Davide Rossi, Antonio Pullini, Alfio Di Mauro, Francesco Conti, Luca Benini
Opublikowane w:
2018 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S), 2018, Strona(/y) 1-3, ISBN 978-1-5386-7627-1
Wydawca:
IEEE
DOI:
10.1109/s3s.2018.8640145
Autorzy:
Lev Mukhanov, Dimitrios S. Nikolopoulos, Georgios Karakonstantis
Opublikowane w:
2020 53rd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO), 2020, Strona(/y) 298-312, ISBN 978-1-7281-7383-2
Wydawca:
IEEE
DOI:
10.1109/micro50266.2020.00035
Autorzy:
Dionysios Diamantopoulos; Mitra Purandare; Burkhard Ringlein; Christoph Hagleitner
Opublikowane w:
2020 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW), 2020
Wydawca:
IEEE
DOI:
10.1109/ipdpsw50202.2020.00023
Autorzy:
Radhika Jagtap, Matthias Jung, Wendy Elsasser, Christian Weis, Andreas Hansson, Norbert Wehn
Opublikowane w:
Proceedings of the International Symposium on Memory Systems - MEMSYS '17, 2017, Strona(/y) 86-95, ISBN 9781-450353359
Wydawca:
ACM Press
DOI:
10.1145/3132402.3132444
Autorzy:
Deepak M. Mathew, Éder F. Zulian, Matthias Jung, Kira Kraft, Christian Weis, Bruce Jacob, Norbert Wehn
Opublikowane w:
Proceedings of the International Symposium on Memory Systems - MEMSYS '17, 2017, Strona(/y) 115-124, ISBN 9781-450353359
Wydawca:
ACM Press
DOI:
10.1145/3132402.3132419
Autorzy:
Goran Flegar, Enrique S. Quintana-Ortí
Opublikowane w:
Euro-Par 2017: Parallel Processing: 23rd International Conference on Parallel and Distributed Computing, Santiago de Compostela, Spain, August 28 – September 1, 2017, Proceedings, 2017, Strona(/y) 697-709
Wydawca:
Springer International Publishing
DOI:
10.1007/978-3-319-64203-1_50
Autorzy:
F. Scheidegger, L. Cavigelli, M. Schaffner, A. C. I. Malossi, C. Bekas, L. Benini
Opublikowane w:
2017 25th European Signal Processing Conference (EUSIPCO), 2017, Strona(/y) 996-1000, ISBN 978-0-9928626-7-1
Wydawca:
IEEE
DOI:
10.23919/EUSIPCO.2017.8081357
Autorzy:
Hartwig Anzt, Jack Dongarra, Goran Flegar, Enrique S. Quintana-Orti
Opublikowane w:
2017 46th International Conference on Parallel Processing (ICPP), 2017, Strona(/y) 91-100, ISBN 978-1-5386-1042-8
Wydawca:
IEEE
DOI:
10.1109/ICPP.2017.18
Autorzy:
Lei Li, Michael Gautschi, Luca Benini
Opublikowane w:
2017 27th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS), Numer 27th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS 2017), Thessaloniki, Greece, September 25-27, 2017, 2017, Strona(/y) 1-8, ISBN 978-1-5090-6462-5
Wydawca:
IEEE
DOI:
10.1109/PATMOS.2017.8106987
Autorzy:
Simone Benatti, Giovanni Rovere, Jonathan Bosser, Fabio Montagna, Elisabetta Farella, Horian Glaser, Philipp Schonle, Thomas Burger, Schekeb Fateh, Qiuting Huang, Luca Benini
Opublikowane w:
2017 7th IEEE International Workshop on Advances in Sensors and Interfaces (IWASI), 2017, Strona(/y) 139-144, ISBN 978-1-5090-6707-7
Wydawca:
IEEE
DOI:
10.1109/IWASI.2017.7974234
Autorzy:
Manuele Rusci, Alessandro Capotondi, Francesco Conti, Luca Benini
Opublikowane w:
2018 International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS), Numer November 2018, 2018, Strona(/y) 1-2, ISBN 978-1-5386-5562-7
Wydawca:
IEEE
DOI:
10.1109/CODESISSS.2018.8525915
Autorzy:
Stefan Mach, Davide Rossi, Giuseppe Tagliavini, Andrea Marongiu, Luca Benini
Opublikowane w:
2018 IEEE International Symposium on Circuits and Systems (ISCAS), 2018, Strona(/y) 1-5, ISBN 978-1-5386-4881-0
Wydawca:
IEEE
DOI:
10.1109/ISCAS.2018.8351816
Autorzy:
A. Cristiano I. Malossi, Michael Schaffner, Anca Molnos, Luca Gammaitoni, Giuseppe Tagliavini, Andrew Emerson, Andres Tomas, Dimitrios S. Nikolopoulos, Eric Flamand, Norbert Wehn
Opublikowane w:
2018 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2018, Strona(/y) 1105-1110, ISBN 978-3-9819263-0-9
Wydawca:
IEEE
DOI:
10.23919/DATE.2018.8342176
Autorzy:
Manuele Rusci, Lukas Cavigelli, Luca Benini
Opublikowane w:
2018 IEEE International Symposium on Circuits and Systems (ISCAS), 2018, Strona(/y) 1-5, ISBN 978-1-5386-4881-0
Wydawca:
IEEE
DOI:
10.1109/ISCAS.2018.8351807
Autorzy:
Satyajit Das, Kevin J. M. Martin, Philippe Coussy, Davide Rossi
Opublikowane w:
2018 IEEE International Symposium on Circuits and Systems (ISCAS), 2018, Strona(/y) 1-5, ISBN 978-1-5386-4881-0
Wydawca:
IEEE
DOI:
10.1109/ISCAS.2018.8351749
Autorzy:
Giuseppe Tagliavini, Stefan Mach, Davide Rossi, Andrea Marongiu, Luca Benin
Opublikowane w:
2018 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2018, Strona(/y) 1051-1056, ISBN 978-3-9819263-0-9
Wydawca:
IEEE
DOI:
10.23919/date.2018.8342167
Autorzy:
Andreas Kurth, Pirmin Vogel, Andrea Marongiu, Luca Benini
Opublikowane w:
2018 IEEE 36th International Conference on Computer Design (ICCD), 2018, Strona(/y) 292-300, ISBN 978-1-5386-8477-1
Wydawca:
IEEE
DOI:
10.1109/iccd.2018.00052
Autorzy:
Victor Kartsch, Marco Guermandi, Simone Benatti, Fabio Montagna, Luca Benini
Opublikowane w:
2019 IEEE Sensors Applications Symposium (SAS), 2019, Strona(/y) 1-6, ISBN 978-1-5386-7713-1
Wydawca:
IEEE
DOI:
10.1109/SAS.2019.8705984
Autorzy:
Fabian Schuiki, Michael Schaffner, Luca Benini
Opublikowane w:
2019 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2019, Strona(/y) 662-667, ISBN 978-3-9819263-2-3
Wydawca:
IEEE
DOI:
10.23919/DATE.2019.8715007
Autorzy:
Giuseppe Tagliavini, Stefan Mach, Davide Rossi, Andrea Marongiu, Luca Benini
Opublikowane w:
2019 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2019, Strona(/y) 654-657, ISBN 978-3-9819263-2-3
Wydawca:
IEEE
DOI:
10.23919/DATE.2019.8714897
Autorzy:
Thomas Grutzmacher, Hartwig Anzt, Florian Scheidegger, Enrique S. Quintana-Orti
Opublikowane w:
2018 IEEE/ACM 8th Workshop on Irregular Applications: Architectures and Algorithms (IA3), 2018, Strona(/y) 61-68, ISBN 978-1-7281-0186-6
Wydawca:
IEEE
DOI:
10.1109/IA3.2018.00015
Autorzy:
Dionysios Diamantopoulos, Christoph Hagleitner
Opublikowane w:
2019
Wydawca:
Cornell University
Autorzy:
Chirag Sudarshan, Jan Lappas, Muhammad Mohsin Ghaffar, Vladimir Rybalkin, Christian Weis, Matthias Jung, Norbert Wehn
Opublikowane w:
2019 IEEE International Symposium on Circuits and Systems (ISCAS), 2019, Strona(/y) 1-5, ISBN 978-1-7281-0397-6
Wydawca:
IEEE
DOI:
10.1109/iscas.2019.8702458
Autorzy:
Jan van Lunteren, Ronald Luijten, Dionysios Diamantopoulos, Florian Auernhammer, Christoph Hagleitner, Lorenzo Chelini, Stefano Corda, Gagandeep Singh
Opublikowane w:
2019 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2019, Strona(/y) 668-673, ISBN 978-3-9819263-2-3
Wydawca:
IEEE
DOI:
10.23919/date.2019.8715088
Autorzy:
Ioannis Tsiokanos, Lev Mukhanov, Georgios Karakonstantis
Opublikowane w:
2019 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2019, Strona(/y) 698-703, ISBN 978-3-9819263-2-3
Wydawca:
IEEE
DOI:
10.23919/date.2019.8714942
Autorzy:
Dionysios Diamantopoulos, Christoph Hagleitner
Opublikowane w:
2018 International Conference on Field-Programmable Technology (FPT), 2018, Strona(/y) 338-341, ISBN 978-1-7281-0214-6
Wydawca:
IEEE
DOI:
10.1109/fpt.2018.00068
Autorzy:
Kira Kraft, Deepak M. Mathew, Chirag Sudarshan, Matthias Jung, Christian Weis, Norbert Wehn, Florian Longnos
Opublikowane w:
Proceedings of the International Symposium on Memory Systems - MEMSYS '18, 2018, Strona(/y) 148-157, ISBN 9781-450364751
Wydawca:
ACM Press
DOI:
10.1145/3240302.3240424
Autorzy:
Matthias Jung, Sally A. McKee, Chirag Sudarshan, Christoph Dropmann, Christian Weis, Norbert Wehn
Opublikowane w:
Proceedings of the International Symposium on Memory Systems - MEMSYS '18, 2018, Strona(/y) 377-386, ISBN 9781-450364751
Wydawca:
ACM Press
DOI:
10.1145/3240302.3240322
Autorzy:
Ioannis Tsiokanos, Lev Mukhanov, Dimitrios S. Nikolopoulos, Georgios Karakonstantis
Opublikowane w:
Proceedings of the International Symposium on Low Power Electronics and Design - ISLPED '18, 2018, Strona(/y) 1-6, ISBN 9781-450357043
Wydawca:
ACM Press
DOI:
10.1145/3218603.3218617
Autorzy:
Ioannis Tsiokanos, Lev Mukhanov, Dimitrios S. Nikolopoulos, Georgios Karakonstantis
Opublikowane w:
2018 IEEE 24th International Symposium on On-Line Testing And Robust System Design (IOLTS), 2018, Strona(/y) 171-176, ISBN 978-1-5386-5992-2
Wydawca:
IEEE
DOI:
10.1109/iolts.2018.8474084
Autorzy:
Christian Weis, Matthias Jung, Eder F. Zulian, Chirag Sudarshan, Deepak M. Mathew, Norbert Wehn
Opublikowane w:
2018 IEEE International Symposium on Circuits and Systems (ISCAS), 2018, Strona(/y) 1-5, ISBN 978-1-5386-4881-0
Wydawca:
IEEE
DOI:
10.1109/iscas.2018.8351768
Autorzy:
Dionysios Diamantopoulos, Heiner Giefers, Christoph Hagleitner
Opublikowane w:
2018 IEEE Symposium in Low-Power and High-Speed Chips (COOL CHIPS), 2018, Strona(/y) 1-3, ISBN 978-1-5386-6103-1
Wydawca:
IEEE
DOI:
10.1109/coolchips.2018.8373077
Autorzy:
Andres E. Tomas Dominguez, Enrique S. Quintana Orti
Opublikowane w:
2018 26th Euromicro International Conference on Parallel, Distributed and Network-based Processing (PDP), 2018, Strona(/y) 385-393, ISBN 978-1-5386-4975-6
Wydawca:
IEEE
DOI:
10.1109/pdp2018.2018.00068
Autorzy:
Heiner Giefers, Dionysios Diamantopoulos
Opublikowane w:
2018 IEEE International Symposium on Circuits and Systems (ISCAS), 2018, Strona(/y) 1-5, ISBN 978-1-5386-4881-0
Wydawca:
IEEE
DOI:
10.1109/iscas.2018.8351755
Autorzy:
Deepak M. Mathew, Martin Schultheis, Carl C. Rheinlander, Chirag Sudarshan, Christian Weis, Norbert Wehn, Matthias Jung
Opublikowane w:
2018 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2018, Strona(/y) 293-296, ISBN 978-3-9819263-0-9
Wydawca:
IEEE
DOI:
10.23919/date.2018.8342023
Autorzy:
Kira Kraft, Chirag Sudarshan, Deepak M. Mathew, Christian Weis, Norbert Wehn, Matthias Jung
Opublikowane w:
2018 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2018, Strona(/y) 1492-1495, ISBN 978-3-9819263-0-9
Wydawca:
IEEE
DOI:
10.23919/date.2018.8342249
Autorzy:
Andrés E. Tomás, Rafael Rodríguez-Sánchez, Sandra Catalán, Enrique S. Quintana-Ortí
Opublikowane w:
Proceedings of the 9th International Workshop on Programming Models and Applications for Multicores and Manycores - PMAM'18, 2018, Strona(/y) 51-60, ISBN 9781-450356459
Wydawca:
ACM Press
DOI:
10.1145/3178442.3178448
Autorzy:
Daniele Palossi, Francesco Conti, Luca Benini
Opublikowane w:
2019 15th International Conference on Distributed Computing in Sensor Systems (DCOSS), 2019, Strona(/y) 604-611, ISBN 978-1-7281-0570-3
Wydawca:
IEEE
DOI:
10.1109/dcoss.2019.00111
Autorzy:
Hans Vandierendonck
Opublikowane w:
Proceedings of the 34th ACM International Conference on Supercomputing, 2020, Strona(/y) 1-13, ISBN 9781450379830
Wydawca:
ACM
DOI:
10.1145/3392717.3392753
Autorzy:
Éder F. Zulian, Germain Haugou, Christian Weis, Matthias Jung, Norbert Wehn
Opublikowane w:
Proceedings of the Conference on Rapid Simulation and Performance Evaluation: Methods and Tools, 2020, Strona(/y) 1-7, ISBN 9781450377775
Wydawca:
ACM
DOI:
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