Practical formal methods for hardware design
A report on "Practical formal methods for hardware design" has been published as part of the "Research Reports ESPRIT" series produced by Springer Verlag. The report details the findings and methodology of the FORMAT (Formal Methods in Hardware Verification) project, financed under the European Community's specific research programme in the field of Information Technologies (ESPRIT). The objective of FORMAT was to reduce the design time for complex hardware modules by providing a set of system-level methods and design tools supporting an enhanced version of VHDL. The report is divided into three main parts. The first part gives an overview of the main goals and approaches of the FORMAT project. Part II covers some of the experiments carried out by the industrial companies in the consortium. Part III includes material about the practical work carried out in the project, dealing in separate sections with the key technologies underlying the verification and synthesis tools.