Periodic Reporting for period 1 - FAMES (FD-SOI Pilot Line for Applications with embedded non-volatile Memories, RF, 3D integration and PMIC, to ensure European Sovereignty)
Okres sprawozdawczy: 2023-12-01 do 2024-12-31
The FAMES Pilot Line consortium, led by CEA-Leti (France), is composed of eleven European partners. Four are Hosting Sites (CEA-Leti, Tyndall in Ireland, VTT in Finland and SAL in Austria), operating collaboratively as a single pilot line, and collectively integrating close to 200 clean room tools (@300mm). Approximately 110 of them will be procured via Joint Procurement Agreements with the EC and the Nations involved. The other seven FAMES Pilot Line partners are renowned RTOs - Imec (Belgium), Fraunhofer (Germany) and Cezamat – WUT (Poland), universities - Université Catholique de Louvain (Belgium), University of Granada (Spain) and Grenoble INP (France), and the SiNANO Institute (France).
The FAMES Pilot Line has two main objectives:
• Establish a domestic semiconductor Pilot Line for advanced technologies in Europe that offers:
o Two generations of the FD-SOI (Fully Depleted Silicon-on-Insulator) technology at the 10nm and 7nm nodes;
o Embedded non-volatile memory (eNVM) options positioned within metallic interconnects above transistors;
o Radiofrequency (RF) components (switches, radio frequency filters and circulators);
o 3D technological stacking options (3D sequential integration and 3D heterogeneous integration);
o Magnetic inductances for Power Management of Integrated Circuits (PMIC).
• Promote and provide access to the FAMES technologies to users located all along the electronic value chain, be it academics, SMEs, start-ups or large industrial groups (materials and equipment suppliers, OEMs, foundries, IDM process technologists…). Access to these advanced electronic technologies will give European stakeholders the opportunity to explore how the miniaturization of electronics can benefit a wide spectrum of semiconductor applications, strengthening Europe’s leadership and opening up new market opportunities.
All the technologies developed with the FAMES Pilot Line will enable new chip architectures. By combining 10 and 7nm FD-SOI, eNVM, RF components, 3D stacking options and magnetic inductances for PMIC, users will be able to design new systems that deliver robust performance enhancements and substantial efficiency gains. The FAMES Pilot Line intends to contribute to maintaining European technological leadership by supporting the generation of intellectual property.
Semiconductor manufacturing, known for its technological precision, generates a considerable environmental footprint. The FAMES Pilot Line will drive eco-friendly practices by prioritizing resource optimization, advocating for a circular economy, and minimizing waste across the entire technological process, from chip design to manufacturing. Additionally, the high-performance, low-power solutions made possible by the FAMES technologies will support the massive digitalization of our society sustainably. A wide range of new energy efficient Integrated Circuit designs will be possible, contributing to fulfilling the objectives of the EU Green Deal. In this way, the FAMES Pilot Line will significantly contribute to the industry's ambition of achieving net-zero emissions by 2050.
The FAMES Pilot Line partners will provide training to circuit designers, microelectronic researchers, clean room technicians, master's and doctoral students. With a strong engagement to build the skills and competencies needed to maintain a robust semiconductor ecosystem in Europe, the FAMES consortium will develop specific programs for different categories of students and employees. Participants will acquire advanced skills in FD-SOI technology, embedded non-volatile memories, 3D integration, RF circuits, and magnetic inductances for PMIC. The FAMES Pilot Line will be well connected with the EU Chips Act design platforms and the associated competence centers and will offer a world-class environment for the acquisition of skills.
The FAMES Pilot Line responds to the European Chips Act Pillar 1, a ‘Chips for Europe initiative’, and specifically to its Operational Objective 2 “Enhancing existing and developing new advanced pilot lines across the EU”. The FAMES Pilot Line will be instrumental to EU’s sovereignty in key semiconductor value chains, from manufacturing to applications, by developing and opening Europe’s access to new technologies. The FAMES Pilot Line will promote a local answer to the needs of the European industry and bolster Europe's standing in the global microelectronics economy. For these reasons, the FAMES Pilot Line will guarantee long-term visibility, safeguard the future and strengthen the European semiconductor ecosystem.
The FAMES Pilot Line will also serve applications that go far beyond the purely digital domain, enabling a whole range of More than Moore devices. The FAMES Pilot Line capabilities and expertise will facilitate the prototyping of core functions including sensor, actuator and transmission functions for a wide range of integrated systems. The FAMES technologies will foster new generations of microcontrollers, microprocessor units, chips for 5G/6G, smart imagers, smart sensors, processors for data fusion, wearable devices, trusted chips, quantum and cryoCMOS, edge AI chip and advanced packaging with chiplets, just to name a few.
In essence, the FAMES Pilot Line will generate an unparalleled combination of cutting-edge technologies, chip design expertise, architectures and testing, demonstrators and manufacturing capabilities. Its technologies will be accessible by all European semiconductor stakeholders including industrial companies, universities and research institutions. Collaborations with the other European Chips Act pilot lines, competences centers and design platforms will create a highly interconnected European ecosystem for advanced chip technologies.
Eligible users will be able to explore the FAMES technologies by requesting access to FAMES Pilot Line R&D services in one of two ways. Users will be able to respond to yearly Open-Access calls in the spring or, if the User’s specific need for advanced technologies are not covered by the yearly calls, submitting a Spontaneous User Request at any time of the year. By employing one or another of these access mechanisms, Users will be able to access design and modeling tools via PDK distributions. Two types of PDKs will be made available: PDK add-ons to access MPWs and test embedded non-volatile memories, RF component and 3D options, and PDKs for IC circuit design assessment. Users will also be able to evaluate FAMES Pilot Line specific processing steps, modules and process integration flows, and have access to selected FAMES Pilot Line equipment. Access to training programs and specific courses on how to use FAMES technologies will also be programmed every year.
The FAMES Pilot Line consortium received 44 letters of support from industrial companies all along the electronic systems value chain. These stakeholders intend to integrate the technologies developed by the FAMES Pilot Line into their products, bolstering their positions in their respective markets.
Benefiting from an impressive track record of successful technology transfers to industry thanks to the specific organization of its cleanroom operations in a “lab to fab” mode, CEA-Leti and the FAMES Pilot Line Partners have the experience, skills and know-how needed to successfully implement the FAMES Pilot Line, and to transfer its technologies to industry.
The FAMES Pilot Line has two main objectives:
• Establish a domestic semiconductor Pilot Line for advanced technologies in Europe that offers:
o Two generations of the FD-SOI (Fully Depleted Silicon-on-Insulator) technology at the 10nm and 7nm nodes;
o Embedded non-volatile memory (eNVM) options positioned within metallic interconnects above transistors;
o Radiofrequency (RF) components (switches, radio frequency filters and circulators);
o 3D technological stacking options (3D sequential integration and 3D heterogeneous integration);
o Magnetic inductances for Power Management of Integrated Circuits (PMIC).
• Promote and provide access to the FAMES technologies to users located all along the electronic value chain, be it academics, SMEs, start-ups or large industrial groups (materials and equipment suppliers, OEMs, foundries, IDM process technologists…). Access to these advanced electronic technologies will give European stakeholders the opportunity to explore how the miniaturization of electronics can benefit a wide spectrum of semiconductor applications, strengthening Europe’s leadership and opening up new market opportunities.
All the technologies developed with the FAMES Pilot Line will enable new chip architectures. By combining 10 and 7nm FD-SOI, eNVM, RF components, 3D stacking options and magnetic inductances for PMIC, users will be able to design new systems that deliver robust performance enhancements and substantial efficiency gains. The FAMES Pilot Line intends to contribute to maintaining European technological leadership by supporting the generation of intellectual property.
Semiconductor manufacturing, known for its technological precision, generates a considerable environmental footprint. The FAMES Pilot Line will drive eco-friendly practices by prioritizing resource optimization, advocating for a circular economy, and minimizing waste across the entire technological process, from chip design to manufacturing. Additionally, the high-performance, low-power solutions made possible by the FAMES technologies will support the massive digitalization of our society sustainably. A wide range of new energy efficient Integrated Circuit designs will be possible, contributing to fulfilling the objectives of the EU Green Deal. In this way, the FAMES Pilot Line will significantly contribute to the industry's ambition of achieving net-zero emissions by 2050.
The FAMES Pilot Line partners will provide training to circuit designers, microelectronic researchers, clean room technicians, master's and doctoral students. With a strong engagement to build the skills and competencies needed to maintain a robust semiconductor ecosystem in Europe, the FAMES consortium will develop specific programs for different categories of students and employees. Participants will acquire advanced skills in FD-SOI technology, embedded non-volatile memories, 3D integration, RF circuits, and magnetic inductances for PMIC. The FAMES Pilot Line will be well connected with the EU Chips Act design platforms and the associated competence centers and will offer a world-class environment for the acquisition of skills.
The FAMES Pilot Line responds to the European Chips Act Pillar 1, a ‘Chips for Europe initiative’, and specifically to its Operational Objective 2 “Enhancing existing and developing new advanced pilot lines across the EU”. The FAMES Pilot Line will be instrumental to EU’s sovereignty in key semiconductor value chains, from manufacturing to applications, by developing and opening Europe’s access to new technologies. The FAMES Pilot Line will promote a local answer to the needs of the European industry and bolster Europe's standing in the global microelectronics economy. For these reasons, the FAMES Pilot Line will guarantee long-term visibility, safeguard the future and strengthen the European semiconductor ecosystem.
The FAMES Pilot Line will also serve applications that go far beyond the purely digital domain, enabling a whole range of More than Moore devices. The FAMES Pilot Line capabilities and expertise will facilitate the prototyping of core functions including sensor, actuator and transmission functions for a wide range of integrated systems. The FAMES technologies will foster new generations of microcontrollers, microprocessor units, chips for 5G/6G, smart imagers, smart sensors, processors for data fusion, wearable devices, trusted chips, quantum and cryoCMOS, edge AI chip and advanced packaging with chiplets, just to name a few.
In essence, the FAMES Pilot Line will generate an unparalleled combination of cutting-edge technologies, chip design expertise, architectures and testing, demonstrators and manufacturing capabilities. Its technologies will be accessible by all European semiconductor stakeholders including industrial companies, universities and research institutions. Collaborations with the other European Chips Act pilot lines, competences centers and design platforms will create a highly interconnected European ecosystem for advanced chip technologies.
Eligible users will be able to explore the FAMES technologies by requesting access to FAMES Pilot Line R&D services in one of two ways. Users will be able to respond to yearly Open-Access calls in the spring or, if the User’s specific need for advanced technologies are not covered by the yearly calls, submitting a Spontaneous User Request at any time of the year. By employing one or another of these access mechanisms, Users will be able to access design and modeling tools via PDK distributions. Two types of PDKs will be made available: PDK add-ons to access MPWs and test embedded non-volatile memories, RF component and 3D options, and PDKs for IC circuit design assessment. Users will also be able to evaluate FAMES Pilot Line specific processing steps, modules and process integration flows, and have access to selected FAMES Pilot Line equipment. Access to training programs and specific courses on how to use FAMES technologies will also be programmed every year.
The FAMES Pilot Line consortium received 44 letters of support from industrial companies all along the electronic systems value chain. These stakeholders intend to integrate the technologies developed by the FAMES Pilot Line into their products, bolstering their positions in their respective markets.
Benefiting from an impressive track record of successful technology transfers to industry thanks to the specific organization of its cleanroom operations in a “lab to fab” mode, CEA-Leti and the FAMES Pilot Line Partners have the experience, skills and know-how needed to successfully implement the FAMES Pilot Line, and to transfer its technologies to industry.