The research within the WP1 was devoted to coupling BTI and HCD models for planar Si FETs. First, we extended the BTI model to model trapping of non-equilibrium hot carriers. To achieve this goal, we modeled trapping rates using non-equilibrium carrier energy distribution functions obtained as a solution of the Boltzmann transport equation. Then, the model for non-equilibrium BTI was coupled to the HCD model and applied to HCD stress → BTI stress → relaxation and BTI stress → HCD stress → relaxation sequences. An important result is that for the latter sequence secondary carriers generated by impact ionization can stimulate recovery of BTI. Moreover, we showed that secondary carriers result in a portion of damage spread over the entire device. Finally, the BTI-HCD model was validated over a wide range of stress conditions and demonstrated good accuracy.
In WP2, the HCD-BTI model was extended to capture HCD and BTI in 3D transistor structures such as FinFETs and NWFETs. Our HCD model (Fig. 1) covers three main aspects: (1) carrier transport, (2) defect generation mechanisms, and (3) simulations of the degraded devices. In FinFETs/NWFETs, SH plays a crucial role and hence we extended the HCD model by coupling the Boltzmann transport equation solver to a lattice heat flow equation solver. We showed that in n-channel 3D FETs, SH depopulates high energy fraction of the carrier ensemble. This impact and the increased contribution to the thermal damage compensate each other and therefore the impact of SH on HCD is weak. This result is consistent with experimental observations. Vice versa, in p-channel FETs, these factors enhance HCD and the model can capture this behavior. Finally, our framework was shown to accurately model HCD-SH over a wide range of stress conditions in various devices. Coupling HCD and BTI models was performed within the analytical simulation framework which is suitable for compact modeling of device degradation at the circuit level.
WP3 was primarily devoted to modeling of HCD in SiGe/Ge devices. We identified that HCD in these FETs is dominated by dissociation of Ge-O bonds (precursors) followed by formation of O vacancies (traps), on top of rupture of Si-H bonds typical for HCD in Si devices. Conducted first principles calculations allowed us to obtain the pathway for the Ge-O bond dissociation reaction, as well as vibrational properties of the bond (needed for SH modeling). The model for HCD-SH in SiGe/Ge FETs accurately covers degradation characteristics for different stress conditions and can explain superior robustness of Ge pNWFETs compared to their Si counterparts.
The modified WP4 has been refocused on a stochastic description of HCD in Si devices. We analyzed impacts of random dopants (RDs) and random traps (RTs) on HCD in nFinFETs. For that, we generated 200 different instantiations of the transistor where each of them has a unique configuration of RDs, solved the Boltzmann transport equation, and obtained the continuous interface state density Nit, which was further randomized to generated 200 instantiations with unique configurations of RTs (in total 40,000 different configurations of RDs and RTs). Then we modeled changes of the linear drain current with time and extracted devices lifetimes. We showed that degradation characteristics have broad distributions and the deterministic HCD model tends to overestimate HCD. Further, distributions of device lifetimes are bi-modal and therefore reflect impacts of RDs and RTs. We also identified correlation between time-0 and HCD induced variabilities.
Finally, within the WP5 we monitored the progress and arising issues, discussed potential risks and corrections to the initial research plan
