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Pilot Integration of 3nm Semiconducter technology

Project description

Building efficient pilot production line for 3-nanometre transistors

Over the past decades, computer chips have gotten smaller thanks to advances in materials science and manufacturing technologies. In the electronics industry this is denoted as Moore’s Law saying that 'on average there is a 2x increase in functionality every 2 years'. In semiconductor manufacturing after the 5-nanometre node which is presently being developed, 3-nanometre is the next. Reducing the size of transistors enables a new class of products that outperform state-of-the-art systems in terms of functionality, speed and power consumption. Tightly connecting with large European equipment developers and academic institutions, the EU-funded PIn3S project aims to launch a pilot production line of 3-nanometre semiconductor technology. The focus will be on optimizing process integration, and developing new lithography, mask repair and metrology tools. This new technological breakthrough will significantly impact diverse industries including communication, mobility, healthcare, energy, and safety and security.


The overall objective of the PIn3S project is to realize Pilot Integration of 3nm Semiconductor technology. This covers Process Integration, creation of Lithography Equipment, EUV Mask Repair Equipment and Metrology tools capable to deal with 3D structures, defects analysis, overlay and feature size evaluation.
Each of these objectives will be achieved by cooperation between key European equipment developers like; ASML, Zeiss, Thermo Fisher, Applied Materials, Nova, KTI involved with their suppliers, involvement of a strong knowledge network based on Universities of Germany, Heidelberg University Hospital, and the Netherland, TU Delft and the University of Twente, complemented with key Technology Institutes such as imec and Fraunhofer.
The project addresses Section 15 “Electronics Components & Systems Process Technology, Equipment, Materials and Manufacturing”, Major Challenge 4 “Maintaining world leadership in Semiconductor Equipment, Materials and Manufacturing solutions” and Major Challenge 1 “Developing advanced logic and memory technology for nanoscale integration and application-driven performance” of the ECSEL JU Annual Work Plan 2018.
As set out in the Multi Annual Strategic Plan 2018, PIn3S addresses the ambition for the European Equipment & Manufacturing industry for advanced semiconductor technologies to lead the world in miniaturization by supplying new equipment and materials approximately two years ahead of introduction of volume production of advanced semiconductor manufacturers.
With the results of the Pin3S project the consortium builds on realizing IC manufacturers to migrate to the 3nm Technology node which enables a class of new products which have more functionality, more performance and are more power efficient. As such it will form the bases for innovations yet to come enabling solutions that address the societal challenges in communication, mobility, health care, security, energy and safety & security.


Net EU contribution
€ 4 445 476,65
DE RUN 6501
5504DR Veldhoven

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Zuid-Nederland Noord-Brabant Zuidoost-Noord-Brabant
Activity type
Private for-profit entities (excluding Higher or Secondary Education Establishments)
Total cost
€ 22 227 383,25

Participants (27)