1. New aging methods to accelerate isolation technology reliability validation:
Standard accelerated lifetime tests on industrial parts are usually performed at 60 Hz, by varying the applied voltage over and above the specification working conditions. An extrapolation fit (e.g. inverse power or exponential law) is then used to establish the working voltage, that is, the voltage at which the lifetime is practically ‘infinite’ (~30 years). However, new applications such as isolated power converters in EVs with fast power devices control (i.e. SiC, GaN) by pulse-width modulation (PWM), involve higher working frequencies potentially ranging up to 100 kHz with very high slew rate >10 kV/μs. It is therefore critical to evaluate the intrinsic behavior of the isolation barrier in high frequency.
A comprehensive investigation assessing both the intrinsic and extrinsic properties of polyimide films at high voltage (up to 10 kHz) and the HVE performance of fully built units also at higher frequency in square wave (>10 kHz) has been performed. Investigations was performed at 2 scales using (i) wafer-level testing and (ii) package-level HVE testing.
It was clearly demonstrated that the nonlinear DC and AC conductivities converge indicating partly common conduction mechanisms close to breakdown. The frequency independent nature of the polyimide AC breakdown was measured at wafer-level up to 10 kHz. A confirmation result of recent square wave high frequency HVE tests at package unit level was carried out at 2kVrms up to 50kHz.
2. New advanced materials that meet the breakdown requirements for higher voltage isolation
This part of the work aims to show how the PI electrical isolation performance is significantly enhanced by introducing thin PECVD silicon nitride (SiN) layers at the PI-electrode interface.
To evaluate the effects of tailoring the interfaces in a production device, 4 different wafer-level test structures have been adapted using the same process flow used in production. Spin-coated PI interfaces with Au and TiW/Au metals were processed with SiN adjacent to either the cathode, anode, neither or both. The test structures are labelled PI, PI-SiN, SiN-PI and SiN-PI-SiN.
The breakdown field of PI film is around 450 Vrms/um. It is increased up to 475 and 480 Vrms/um for PI-SiN and SiN-PI, respectively. Finally, the highest improvement is for the symmetrical SiN-PI-SiN structure with a dielectric strength around 510 Vrms/um. The SiN barrier efficiently enhances the dielectric behavior of the full stack in terms in HV. Tailoring both sides of PI film with a higher bandgap material at its interfaces with metal is a valuable strategy to limit injection in bulk. The electric field threshold for the initiation of charge injection into PI is significantly increased when a SiN layer is introduced at its interfaces with metallization and correlates with breakdown field enhancement, proving a superior injection barrier efficiency.
The dissemination of the project results has taken place in two ways: internally at ADI and externally to different audiences. Internally, the dissemination of the results occurred in ADI during the two main internal conferences and the internal workshop: i) ADLEC - Analog Devices Limerick Engineering Conference (attended by ADI engineers mostly based in Ireland) and ii) GTC - General Technical Conference (global ADI event) and the Isolation TechDay workshop. On top of that, appropriate intellectual property has been protected throughout the course of the project and 2 patents have been filed based on the project results before to communicate externally. The dissemination of the results occurred through the open access publications of 1 guest edited book, 2 book chapters, 3 journal papers (IEEE TDEI, JAP, MDPI Polymers), 1 White paper available on the ADI website, and 5 IEEE conference papers.
