Cel Silicon CMOS is rapidly running out of steam and the entire semiconductor industry is puzzled about what comes next as the roadmap advances towards the terahertz region. It is clear that virtually every material (gate, gate oxide and channel) used in the current transistor must be replaced within the next 3 - 4 years, without interruption in the industry's pace.Two high mobility material classes are emerging as potential silicon replacement: germanium (Ge) and compound semiconductors (CS). The goal of this project is to find out which one presents the best future technology platform. This formidable question requires a major rethinking of all materials and processes. It will be addressed here from all relevant aspects: advanced large area wafers, novel gate stacks and transistor processing. With a strict focus on a simple and well- defined process-flow as well as an innovative, fast materials characterization track, the main strengths and showstoppers for each material system will be identified.The first objective is to demonstrate that high mobility large area compliant substrates of Ge-on-insulator (GOI) and CS- on-insulator (CSOI) can be obtained. GOI, and CSOI will be grown by developing a "strained oxide template on Si" technology based on molecular beam epitaxy (MBE). The second objective is to demonstrate high quality gate stacks on Ge and CS. The challenge is to find suitable high-k compounds that can be used as gate dielectrics while maintaining high channel mobilities. The development of amorphous or epitaxial (for double gate) metal gates is also an essential project component. The third objective is to integrate the new channel and gate materials with a 200 mm semiconductor wafer processing line to demonstrate high mobility transistors for a few well chosen material systems. Dziedzina nauki natural sciencesphysical scienceselectromagnetism and electronicssemiconductivitynatural scienceschemical sciencesinorganic chemistrymetalloids Słowa kluczowe Nanotechnology Program(-y) FP6-IST - Information Society Technologies: thematic priority under the specific programme "Integrating and strengthening the European research area" (2002-2006). Temat(-y) IST-2002-2.3.1.1 - Pushing the limits of CMOS, preparing for post-CMOS Zaproszenie do składania wniosków Data not available System finansowania STREP - Specific Targeted Research Project Koordynator NATIONAL CENTRE FOR SCIENTIFIC RESEARCH "DEMOKRITOS" Wkład UE Brak danych Adres PATRIARCHOU GREGORIOU STREET 15310 AGHIA PARASKEVI ATTIKIS Grecja Zobacz na mapie Koszt całkowity Brak danych Uczestnicy (7) Sortuj alfabetycznie Sortuj według wkładu UE Rozwiń wszystko Zwiń wszystko CONSIGLIO NAZIONALE DELLE RICERCHE Włochy Wkład UE Brak danych Adres Zobacz na mapie Linki Strona internetowa Opens in new window Koszt całkowity Brak danych DCA-INSTRUMENTS OY Finlandia Wkład UE Brak danych Adres VAJOSSUONKATU 8 20360 TURKU Zobacz na mapie Koszt całkowity Brak danych ECOLE POLYTECHNIQUE FEDERALE DE LAUSANNE Szwajcaria Wkład UE Brak danych Adres 1015 LAUSANNE Zobacz na mapie Koszt całkowity Brak danych INTERNATIONAL BUSINESS MACHINES CORPORATION Stany Zjednoczone Wkład UE Brak danych Adres NEW ORCHARD ROAD NY 10504 ARMONK Zobacz na mapie Koszt całkowity Brak danych INTERUNIVERSITAIR MICRO-ELECTRONICA CENTRUM VZW Belgia Wkład UE Brak danych Adres KAPELDREEF 75 3001 LEUVEN Zobacz na mapie Koszt całkowity Brak danych NXP SEMICONDUCTORS BELGIUM NV Belgia Wkład UE Brak danych Adres INTERLEUVENLAAN 80 LEUVEN Zobacz na mapie Koszt całkowity Brak danych TECHNISCHE UNIVERSITAET CLAUSTHAL Niemcy Wkład UE Brak danych Adres ADOLPH-ROEMER-STRASSE 2A 38678 CLAUSTHAL-ZELLERFELD Zobacz na mapie Koszt całkowity Brak danych