Cryogenic 3D Nanoelectronics

Informacje na temat projektu

SEQUENCE

Identyfikator umowy o grant: 871764

DOI

10.3030/871764

Projekt został zamknięty

Data podpisania przez KE 5 Grudnia 2019

Data rozpoczęcia 1 Stycznia 2020

Data zakończenia 31 Lipca 2023

Finansowanie w ramach

• INDUSTRIAL LEADERSHIP - Leadership in enabling and industrial technologies - Information and Communication Technologies (ICT)

Koszt całkowity

€ 4 466 278,75

Wkład UE

€ 4 466 277,00

Koordynowany przez

LUNDS UNIVERSITET
Sweden

CORDIS oferuje możliwość skorzystania z odnośników do publicznie dostępnych publikacji i rezultatów projektów realizowanych w ramach programów ramowych HORYZONT.

Odnośniki do rezultatów i publikacji związanych z poszczególnymi projektami 7PR, a także odnośniki do niektórych konkretnych kategorii wyników, takich jak zbiory danych i oprogramowanie, są dynamicznie pobierane z systemu OpenAIRE .

Rezultaty

Documents, reports (16)

Final benchmarking towards evolving wideband communication and sensing including identification of limiting factors
Initial benchmarking towards evolving wideband communication and sensing
Final report on electrical parameter, interface dielectric trap and RF (S parameter and NF) characterization of devices operated at cryogenic condition

Final report on electrical parameter interface dielectric trap and RF S parameter and NF characterization of devices operated at cryogenic condition

Report on first version of device compact models for LF and RF circuit simulation
First report on interface dielectric trap and RF (S parameter and NF) characterization of devices operated at cryogenic condition
Web site launch
Report on extremely low temperature (20mK-4K) device characterization

Report on extremely low temperature 20mK4K device characterization

Road map for integrated and improved quantum computer electronics
Report on device compact modelling for LF and RF circuit simulation
Report on self heating device characterization by thermal and electrical techniques
Review of key building blocks for cryogenic logic and space, 40-70 K, as well as wideband communication, RT
First report on electrical characterization and parameter extraction of devices operated at cryogenic condition
External Communication Plan
Dissemination Plan
Final Dissemination Plan
Initial report on circuit design with layouts and simulated performance

Publikacje

Peer reviewed articles (17)

On the diffusion current in a MOSFET operated down to deep cryogenic temperatures

Autorzy: G. Ghibaudo, M. Aouad, M. Casse, T. Poiroux, C. Theodorou
Opublikowane w: Solid-State Electronics, Numer 176, 2021, Strona(/y) 107949, ISSN 0038-1101
Wydawca: Pergamon Press Ltd.
DOI: 10.1016/j.sse.2020.107949

Performance and Low-Frequency Noise of 22-nm FDSOI Down to 4.2 K for Cryogenic Applications

Autorzy: Bruna Cardoso Paz, Mikael Casse, Christoforos Theodorou, Gerard Ghibaudo, Thorsten Kammler, Luca Pirro, Maud Vinet, Silvano de Franceschi, Tristan Meunier, Fred Gaillard
Opublikowane w: IEEE Transactions on Electron Devices, Numer 67/11, 2020, Strona(/y) 4563-4567, ISSN 0018-9383
Wydawca: Institute of Electrical and Electronics Engineers
DOI: 10.1109/ted.2020.3021999

First Demonstration of Distributed Amplifier MMICs With More Than 300-GHz Bandwidth

Autorzy: Fabian Thome, Arnulf Leuther
Opublikowane w: IEEE Journal of Solid-State Circuits, 2021, Strona(/y) 1-1, ISSN 0018-9200
Wydawca: Institute of Electrical and Electronics Engineers
DOI: 10.1109/jssc.2021.3052952

Optimization of Near‐Surface Quantum Well Processing

Autorzy: Patrik Olausson, Lasse Södergren, Mattias Borg, Erik Lind
Opublikowane w: physica status solidi (a), Numer 218/7, 2021, Strona(/y) 2000720, ISSN 1862-6300
Wydawca: Wiley - V C H Verlag GmbbH & Co.
DOI: 10.1002/pssa.202000720

Tuning of Source Material for InAs/InGaAsSb/GaSb Application-Specific Vertical Nanowire Tunnel FETs

Autorzy: Abinaya Krishnaraja, Johannes Svensson, Elvedin Memisevic, Zhongyunshen Zhu, Axel R. Persson, Erik Lind, Lars Reine Wallenberg, Lars-Erik Wernersson
Opublikowane w: ACS Applied Electronic Materials, Numer 2/9, 2020, Strona(/y) 2882-2887, ISSN 2637-6113
Wydawca: ACS
DOI: 10.1021/acsaelm.0c00521

Evidence of 2D intersubband scattering in thin film fully depleted silicon-on-insulator transistors operating at 4.2 K

Autorzy: Mikaël Cassé, Bruna Cardoso Paz, Gérard Ghibaudo, Thierry Poiroux, Emmanuel Vincent, Philippe Galy, André Juge, Fred Gaillard, Silvano de Franceschi, Tristan Meunier, Maud Vinet
Opublikowane w: Applied Physics Letters, Numer 116/24, 2020, Strona(/y) 243502, ISSN 0003-6951
Wydawca: American Institute of Physics
DOI: 10.1063/5.0007100

Simulation of low-noise amplifier with quantized ballistic nanowire channel

Autorzy: Christian Marty, Clarissa Convertino, Cezar Zota
Opublikowane w: Semiconductor Science and Technology, Numer 35/11, 2020, Strona(/y) 115027, ISSN 0268-1242
Wydawca: Institute of Physics Publishing
DOI: 10.1088/1361-6641/abb841

The Role of Oxide Traps Aligned With the Semiconductor Energy Gap in MOS Systems

Autorzy: Enrico Caruso, Jun Lin, Scott Monaghan, Karim Cherkaoui, Farzan Gity, Pierpaolo Palestri, David Esseni, Luca Selmi, Paul K. Hurley
Opublikowane w: IEEE Transactions on Electron Devices, Numer 67/10, 2020, Strona(/y) 4372-4378, ISSN 0018-9383
Wydawca: Institute of Electrical and Electronics Engineers
DOI: 10.1109/ted.2020.3018095

A hybrid III–V tunnel FET and MOSFET technology platform integrated on silicon

Autorzy: Clarissa Convertino, Cezar B. Zota, Heinz Schmid, Daniele Caimi, Lukas Czornomaz, Adrian M. Ionescu, Kirsten E. Moselund
Opublikowane w: Nature Electronics, Numer 4/2, 2021, Strona(/y) 162-170, ISSN 2520-1131
Wydawca: Nature
DOI: 10.1038/s41928-020-00531-3

InGaAs MOSHEMT W -Band LNAs on Silicon and Gallium Arsenide Substrates

Autorzy: Fabian Thome, Felix Heinz, Arnulf Leuther
Opublikowane w: IEEE Microwave and Wireless Components Letters, Numer 30/11, 2020, Strona(/y) 1089-1092, ISSN 1531-1309
Wydawca: Institute of Electrical and Electronics Engineers
DOI: 10.1109/lmwc.2020.3025674

III-V-on-Si transistor technologies: Performance boosters and integration

Autorzy: D. Caimi, H. Schmid, T. Morf, P. Mueller, M. Sousa, K.E. Moselund, C.B. Zota
Opublikowane w: Solid-State Electronics, Numer 185, 2021, Strona(/y) 108077, ISSN 0038-1101
Wydawca: Pergamon Press Ltd.
DOI: 10.1016/j.sse.2021.108077

Scaled III-V-on-Si Transistors for Low-Power Logic and Memory Applications

Autorzy: Daniele Caimi, Marilyne Sousa, Siegfried Karg and Cezar B. Zota
Opublikowane w: Japanese Journal of Applied Physics, Numer 60/SB, 2021, Strona(/y) SB0801, ISSN 0021-4922
Wydawca: IOP Science
DOI: 10.35848/1347-4065/abd707

Generalized Boltzmann relations in semiconductors including band tails

Autorzy: Arnout Beckers, Dominique Beckers, Farzan Jazaeri, Bertrand Parvais, Christian Enz
Opublikowane w: Journal of Applied Physics, Numer 129/4, 2021, Strona(/y) 045701, ISSN 0021-8979
Wydawca: American Institute of Physics
DOI: 10.1063/5.0037432

Mobility of near surface MOVPE grown InGaAs/InP quantum wells

Autorzy: Lasse Södergren, Navya Sri Garigapati, Mattias Borg, Erik Lind
Opublikowane w: Applied Physics Letters, Numer 117/1, 2020, Strona(/y) 013102, ISSN 0003-6951
Wydawca: American Institute of Physics
DOI: 10.1063/5.0006530

Heterogeneous Integration of III-V Materials by Direct Wafer Bonding for High-Performance Electronics and Optoelectronics

Autorzy: Daniele Caimi, Preksha Tiwari, Marilyne Sousa, Kirsten E. Moselund, Cezar B. Zota
Opublikowane w: IEEE Transactions on Electron Devices, 2021, Strona(/y) 1-8, ISSN 0018-9383
Wydawca: Institute of Electrical and Electronics Engineers
DOI: 10.1109/ted.2021.3067273

Millimeter-Wave Vertical III-V Nanowire MOSFET Device-to-Circuit Co-Design

Autorzy: Stefan Andric, Lars Ohlsson Fhager, Lars-Erik Wernersson
Opublikowane w: IEEE Transactions on Nanotechnology, Numer 20, 2021, Strona(/y) 434-440, ISSN 1536-125X
Wydawca: Institute of Electrical and Electronics Engineers
DOI: 10.1109/tnano.2021.3080621

Cryogenic Operation of Thin-Film FDSOI nMOS Transistors: The Effect of Back Bias on Drain Current and Transconductance

Autorzy: M. Casse, B. Cardoso Paz, G. Ghibaudo, T. Poiroux, S. Barraud, M. Vinet, S. de Franceschi, T. Meunier, F. Gaillard
Opublikowane w: IEEE Transactions on Electron Devices, Numer 67/11, 2020, Strona(/y) 4636-4640, ISSN 0018-9383
Wydawca: Institute of Electrical and Electronics Engineers
DOI: 10.1109/ted.2020.3022607

Conference proceedings (6)

Design of III-V Vertical Nanowire MOSFETs for Near-Unilateral Millimeter-Wave Operation

Autorzy: Stefan Andrić, Lars Ohlsson-Fhager, Lars-Erik Wernersson
Opublikowane w: Numer 10-15 Jan. 2021, 2020
Wydawca: IEEE

Poisson-Schrödinger simulation of inversion charge in FDSOI MOSFET down to 0K - Towards compact modeling for cryo CMOS application

Autorzy: M. Aouad, S. Martinie, F. Triozon, T. Poiroux, M. Vinet, G. Ghibaudo
Opublikowane w: 2020 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS), 2020, Strona(/y) 1-4, ISBN 978-1-7281-8765-5
Wydawca: IEEE
DOI: 10.1109/eurosoi-ulis49407.2020.9365297

Vertical InAs/InGaAsSb/GaSb Nanowire Tunnel FETs on Si with Drain Field-Plate and EOT = 1 nm Achieving S min = 32 mV/dec and g m /I D = 100 V -1

Autorzy: Abinaya Krishnaraja, Johannes Svensson, Lars-Erik Wernersson
Opublikowane w: 2020 IEEE Silicon Nanoelectronics Workshop (SNW), 2020, Strona(/y) 17-18, ISBN 978-1-7281-9735-7
Wydawca: IEEE
DOI: 10.1109/snw50361.2020.9131656

III-V Nanowire MOSFETs: RF-Properties and Applications

Autorzy: Lars-Erik Wernersson
Opublikowane w: 2020 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS), 2020, Strona(/y) 1-4, ISBN 978-1-7281-9749-4
Wydawca: IEEE
DOI: 10.1109/bcicts48439.2020.9392932

Cryo-CMOS Compact Modeling

Autorzy: Christian Enz, Arnout Beckers, Farzan Jazaeri
Opublikowane w: 2020 IEEE International Electron Devices Meeting (IEDM), 2020, Strona(/y) 25.3.1-25.3.4, ISBN 978-1-7281-8888-1
Wydawca: IEEE
DOI: 10.1109/iedm13553.2020.9371894

Ultra-Low Power Scaled III-V-on-Si 1T-DRAMs With Quantum Well Heterostructures

Autorzy: C. Convertino, L. Vergano, L. Czornomaz, C. B. Zota, S. Karg
Opublikowane w: 2020 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS), 2020, Strona(/y) 1-4, ISBN 978-1-7281-8765-5
Wydawca: IEEE
DOI: 10.1109/eurosoi-ulis49407.2020.9365288

Book chapters (1)

Low Temperature Characterization and Modeling of FDSOI Transistors for Cryo CMOS Applications

Autorzy: Mikaël Cassé, Gérard Ghibaudo
Opublikowane w: Low-Temperature Technologies [Working Title], 2021
Wydawca: IntechOpen
DOI: 10.5772/intechopen.98403