Reliable and Variability tolerant System-on-a-chip Design in More-Moore Technologies

Projektinformationen

REALITY

ID Finanzhilfevereinbarung: 216537

Abgeschlossenes Projekt

Startdatum 1 Januar 2008

Enddatum 31 August 2010

Finanziert unter

• Specific Programme "Cooperation": Information and communication technologies

Gesamtkosten € 4 447 211,00

EU-Beitrag € 2 899 883,00

Koordiniert durch

INTERUNIVERSITAIR MICRO-ELECTRONICA CENTRUM
Belgium

Sonstige Dokumente

• Press release at the start of the project
• Publishable Summary
• Risk management plan
• Semi-annual project progress report
• Promotional flyer
• Press release at the end of the project
• Project activity report P2
• Report: techniques for enhancing interconnect variability tolerance
• Dissemination and use plan first issue
• Report: Software techniques for flexible data allocation
• Final Report
• Project activity report P1
• Dissemination and use plan (second issue)
• Report: techniques for enhancing data path and controller variability tolerance
• Publishable Summary
• Project activity report P3
• Variability simulation and comparison for the 45 nm technology generation
• Report on methodology for percolating variability sensitivity
• Validation plan for the evaluation of the results for both individual blocks and the system platform as defined by WP2,3,4,5
• Report: : Control algorithms for system level reliability and variability management
• Report on Variation-Aware electronic information format
• Report on Variation-Aware Statistical Characterization Techniques
• Poster presented at "Design, Automation & Test in Europe" exhibition (http://www.date-conference.co